Use of Hard Mask for Finer (&lt;10 μm) Through Silicon Vias (TSVs) Etching

Choi, Somang; Hong, Sang Jeen

doi:10.4313/teem.2015.16.6.312

Cited by 4 publications

(3 citation statements)

References 29 publications

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“…Traditional PR mask resulted in collapsed scallop patterns with smaller CDs. Choi and Hong [5] compared the etching results with PR and SiO 2 masks during fabrication of small structures. They found that SiO 2 hard mask provided better Si etch rate and smoother sidewalls compared to the PR mask.…”

Section: Introductionmentioning

confidence: 99%

A model for etching of three-dimensional high aspect ratio silicon structures in pulsed inductively coupled plasmas

Wang

Tian

Rauf

et al. 2018

Plasma Sources Sci. Technol.

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A coupled plasma-feature scale model is employed to investigate the etching of high aspect ratio (HAR) silicon (Si) structures using a cyclic multi-step pulsed plasma process in an inductively coupled plasma (ICP) reactor. This process sequence includes an oxidation step to help protect the Si sidewalls, a main Si etch step where the ion energy and angular distribution (IEAD) and ion/neutral flux ratio are controlled through power pulsing, and a clean step prior to repeating the multi-step process. Two-dimensional plasma models are used to compute the IEAD as well as the fluxes of relevant ions and neutral radicals at the wafer. These plasma models are coupled to a three-dimensional feature scale model, where multiple cycles of the three-step etch sequence are simulated. The paper focuses on evaluation of several pulsing modes during the main Si etch step including separate pulsing of the ICP source or RF bias power, and their synchronized pulsing (with phase control). Process performance has been quantitatively evaluated by examining etch rates for Si and the SiO 2 -like mask, Si/mask etch selectivity, and CDs within the HAR features. When only the RF bias power is pulsed, Si and mask etch rates scale with pulse duty cycle (DC). As a result, if Si is etched to the same depth, the HAR trenches are wider at higher DCs due to less total oxidation time and less protection of the sidewalls. ICP source power pulsing provides higher Si etch rate because of RF bias power being on continuously, but suffers from poor mask selectivity. Synchronized pulsing of both the ICP source and RF bias powers in conjunction with phase control provides additional flexibility in modulating the IEAD and the ion/neutral flux ratio. RF bias pulsing and in-phase synchronized pulsing yield the best selectivity for the conditions explored.

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Section: Introductionmentioning

confidence: 99%

A model for etching of three-dimensional high aspect ratio silicon structures in pulsed inductively coupled plasmas

Wang

Tian

Rauf

et al. 2018

Plasma Sources Sci. Technol.

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show abstract

“…For specific TSV applications, 97,98) the use of an organic resist instead of an inorganic hardmask (e.g. SiO 2 ) as masking material for deep RIE is preferred, since it minimizes the number of process steps and can be easily stripped in situ.…”

Section: Moore's Law 20mentioning

confidence: 99%

Evolution of patterning materials towards the Moore’s Law 2.0 Era

Goldfarb

2022

Jpn. J. Appl. Phys.

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In this paper, the utilization of lithographic materials for semiconductor patterning applications based on optical and EUV radiation sources is reviewed. Photoresist platforms including novolac, chemically amplified, chain scission, molecular and inorganic materials are discussed in relation to their chemistry, design, processing, and performance. If the focus of Moore's Law 1.0 was on laterally scaling the number of components on a single chip, Moore's Law 2.0 can be understood as the coming era of 3D scaling, where the improved performance from 2D shrinking is replaced by integrated AI, 3D Packaging, 3D transistors and new types of memory, among other enabling enablers. As the historical patterning challenges faced by the lithographic industry to scale down semiconductor devices over multiple technology nodes are reviewed from a materials perspective, insight is given regarding future patterning materials utilization and the importance of back-implementing leading-edge materials for Moore's Law 2.0 patterning applications.

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“…CO 2 , COS, O 2 , C 4 F 8 , SF 6 , Ar etc., are usually used during hard mask etching. [8][9][10] Main etching (ME) is the reaction of C 4 F 8 , C 4 F 6 , O 2 , Ar, NF 3 with SiO 2 film. [11][12][13] The fluorine plasmas (F * ) dissociated by fluorocarbons and hydrofluorocarbons can react with ARC to generate gas then volatilize.…”

mentioning

confidence: 99%

Optimization of Etch Process for Ultra-Narrow Via in 3D NAND Flash Memory by DOE Method

Ma¹,

Li²,

Zheng³

et al. 2019

ECS J. Solid State Sci. Technol.

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With the increase of storage density in three-dimensional NAND flash memory, technical challenges become more and more severe. Specifically, the etch process of ultra-narrow via is one of the most intricate technical challenges. The critical dimension (CD) of ultra-narrow via is sensitively affected by this process. In this paper, a Design of Experiment (DOE) was presented to develop an optimized etch process. Various statistical correlations between factors and measured results were analyzed by statistical software. Tail phenomenon and cliff effect were explicated by wafer level analysis. A process regression model was employed for process window check and process optimization. Based on data analysis, modeling, and supplementary experiments, the ratio of CxFy to CxHyFz during the etching of anti-reflective coating (ARC) was identified as the most significant factor for the etch process of ultra-narrow via. DOE method is also helpful in developing advanced etch process in state-of-the-art 3D NAND flash memory.

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Use of Hard Mask for Finer (<10 μm) Through Silicon Vias (TSVs) Etching

Cited by 4 publications

References 29 publications

A model for etching of three-dimensional high aspect ratio silicon structures in pulsed inductively coupled plasmas

A model for etching of three-dimensional high aspect ratio silicon structures in pulsed inductively coupled plasmas

Evolution of patterning materials towards the Moore’s Law 2.0 Era

Optimization of Etch Process for Ultra-Narrow Via in 3D NAND Flash Memory by DOE Method

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