Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures

Abstract

This paper presents a novel and low-cost methodology for testing embedded Low Noise Amplifiers (LNAs). It is based on the detection and analysis of the response envelope of the Device Under Test (DUT) to a two-tone input signal. The envelope signal is processed to obtain a digital signature sensitive to key specifications of the DUT. An optimized regression model based on ensemble learning is used to relate the digital signatures to the target specifications. The proposed test procedure is studied from an analytical point of view, and a demonstrator has been developed to prove the feasibility of the approach. This demonstrator features a 2.445GHz low-power LNA and a simple envelope detector, and has been

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs

“…Results in [5] show that the proposed signature exhibits a good correlation with some important performance figures of LNAs, such as Gain, Noise Figure, 3 rd -order Input Intercept Point, and the scattering parameters S 11 , and S 22 . …”

“…In order to show the feasibility of this approach, we have applied it to the alternate test of a LNA designed in a 90nm CMOS technology. In particular, our case study is the alternate test strategy published by the authors in [5]. Our goal is to show that multi-V DD conditions will improve the accuracy in this case study, while using the same set of observables and the same statistical tools.…”

“…Our goal is to show that multi-V DD conditions will improve the accuracy in this case study, while using the same set of observables and the same statistical tools. For the sake of completeness, this section describes briefly the test strategy in [5], and presents the DUT design. The sensitivity of the LNA performance specifications to power variations is also analyzed in detail.…”

“…Recent work in this area includes defect modeling and failure diagnosis [1], [2], alternate test [2]- [5], DfT and BIST techniques [6]- [8], etc.…”

“…It takes advantage of the variation of the DUT performance under multiple power conditions to add an extra layer of information to the input space of observables. In order to show the feasibility of the proposed technique, it is applied to a test strategy for LNAs, previously published by the authors, based on ensemble learning of digital envelope signatures [5].…”