Algorithms for energy optimization using processor instructions

Seth, Anil; Keskar, Ravindra B.; Venugopal, R.

doi:10.1145/502251.502252

Cited by 4 publications

(4 citation statements)

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“…Seth et al [22] explored the possibility of using the compiler to insert idle instructions automatically, increasing the execution time up to a set limit. Using the SIMD pipeline has been shown to decrease energy consumption [23] by roughly 25%.…”

Section: Optimisations Targeting Energymentioning

confidence: 99%

Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms

Pallister

Hollis

Bennett

2013

The Computer Journal

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This paper presents an analysis of the energy consumption of an extensive number of the optimisations a modern compiler can perform. Using GCC as a test case, we evaluate a set of ten carefully selected benchmarks for five different embedded platforms. A fractional factorial design is used to systematically explore the large optimisation space (2 82 possible combinations), whilst still accurately determining the effects of optimisations and optimisation combinations. Hardware power measurements on each platform are taken to ensure all architectural effects on the energy consumption are captured. We show that fractional factorial design can find more optimal combinations than relying on built in compiler settings. We explore the relationship between runtime and energy consumption, and identify scenarios where they are and are not correlated. A further conclusion of this study is the structure of the benchmark has a larger effect than the hardware architecture on whether the optimisation will be effective, and that no single optimisation is universally beneficial for execution time or energy consumption.

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Section: Optimisations Targeting Energymentioning

confidence: 99%

Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms

Pallister

Hollis

Bennett

2013

The Computer Journal

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“…Seth et al [32] present algorithmic strategies for insertion of processor idle instructions at various points in the program such that the overall energy is reduced. Sami et al [30] employ liveness analysis to reduce the register file power in VLIW embedded architectures.…”

Section: Miscellaneousmentioning

confidence: 99%

GREENER: A Tool for Improving Energy Efficiency of Register Files

Jatala,

Anantpur,

Karkare

2017

Preprint

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Graphics Processing Units (GPUs) maintain a large register file to increase the thread level parallelism (TLP). To increase the TLP further, recent GPUs have increased the number of on-chip registers in every generation. However, with the increase in the register file size, the leakage power increases. Also, with the technology advances, the leakage power component has increased and has become an important consideration for the manufacturing process. The leakage power of a register file can be reduced by turning infrequently used registers into low power (drowsy or off) state after accessing them. A major challenge in doing so is the lack of runtime register access information.This paper proposes GREENER (GPU REgister file ENErgy Reducer): a system to minimize leakage energy of the register file of GPUs. GREENER employs a compile-time analysis to estimate the run-time register access information. The result of the analysis is used to determine the power state of the registers (ON, SLEEP, or OFF) after each instruction. We propose a power optimized assembly instruction set that allows GREENER to encode the power state of the registers in the executable itself. The modified assembly, along with a run-time optimization to update the power state of a register during execution, results in significant power reduction.We implemented GREENER in GPGPU-Sim simulator, and used GPUWattch framework to measure the register file's leakage power. Evaluation of GREENER on 21 kernels from CUDASDK, GPGPU-SIM, Parboil, and Rodinia benchmarks suites shows an average reduction of register leakage energy by 69.04% and maximum reduction of 87.95% with a negligible number of simulation cycles overhead (0.53% on average). CCS Concepts: • Computer systems organization → Single instruction, multiple data; • Hardware → Power and energy; • Software and its engineering → Compilers;

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“…Other software optimizations targeting energy have considered automatically inserting idle instructions [20], instruction scheduling [18], use of SIMD [11] and exploiting differences in functional units [6].…”

Section: Related Workmentioning

confidence: 99%

A high-level model of embedded flash energy consumption

Pallister

Eder

Hollis

et al. 2014

Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems

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The alignment of code in the flash memory of deeply embedded SoCs can have a large impact on the total energy consumption of a computation. We investigate the effect of code alignment in six SoCs and find that a large proportion of this energy (up to 15% of total SoC energy consumption) can be saved by changes to the alignment. A flexible model is created to predict the read-access energy consumption of flash memory on deeply embedded SoCs, where code is executed in place. This model uses the instruction level memory accesses performed by the processor to calculate the flash energy consumption of a sequence of instructions. We derive the model parameters for five SoCs and validate them. The error is as low as 5%, with a 11% average normalized RMS deviation overall. The scope for using this model to optimize code alignment is explored across a range of benchmarks and SoCs. Analysis shows that over 30% of loops can be better aligned. This can significantly reduce energy while increasing code size by less than 4%. We conclude that this effect has potential as an effective optimization, saving significant energy in deeply embedded SoCs

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Algorithms for energy optimization using processor instructions

Cited by 4 publications

References 0 publications

Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms

Identifying Compiler Options to Minimize Energy Consumption for Embedded Platforms

GREENER: A Tool for Improving Energy Efficiency of Register Files

A high-level model of embedded flash energy consumption

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