Advances in fully CMOS integrated photonic devices

Michel, Jürgen; Liu, J. F.; Ahn, Donghwan; Sparacin, Daniel K.; Sun, Renren; Hong, Ching-yin; Giziewicz, Wojciech; Beals, Mark; Kimerling, Lionel C.; Kopa, Anthony; Apsel, Alyssa; Rasras, Mahmoud; Gill, Douglas M.; Patel, Sanjay; Tu, Kun-Yii; Chen, Y. K.; White, Alice E.; Pomerene, Andrew; Carothers, Daniel; Grove, Michael

doi:10.1117/12.706586

Cited by 9 publications

(9 citation statements)

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“…BAE Systems has been working in silicon photonics since 2004; BAE was a prime contractor on the DARPA EPIC program has published on the results of integrating photonics with 180 nm CMOS 10, 11 . BAE Systems announced the WaveMOS process in 2010, a silicon photonics platform with 180 nm CMOS for commercial customers.…”

Section: Bae Technologymentioning

confidence: 99%

Shared shuttles for integrated silicon optoelectronics

et al. 2012

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Shared shuttle runs are an important factor of the microelectronics business ecosystem, allowing fabless semiconductor companies to access advanced processes and supporting the development of new tools and processes. We report on the creation and progress of a shared shuttle program for access to advanced silicon photonics optoelectronic platforms that we expect will create a similar environment for the field of integrated photonics.

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Section: Bae Technologymentioning

confidence: 99%

Shared shuttles for integrated silicon optoelectronics

et al. 2012

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“…Advances in the development of photonic components using high index contrast design is enabling the integration of these devices in CMOS processes leading to creation of monolithic electronic photonic integrated circuits 4,5,6,7 . Drivers for the further development and use of this technology include: increasing demand for high frequency mixed signal processing, ability to operate at high bandwidths in chip-to-chip as well as within the chip for multicore applications with greater power efficiency and lower manufacturing cost.…”

Section: Introductionmentioning

confidence: 99%

Process flow innovations for photonic device integration in CMOS

et al. 2008

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Multilevel thin film processing, global planarization and advanced photolithography enables the ability to integrate complimentary materials and process sequences required for high index contrast photonic components all within a single CMOS process flow. Developing high performance photonic components that can be integrated with electronic circuits at a high level of functionality in silicon CMOS is one of the basic objectives of the EPIC program sponsored by the Microsystems Technology Office (MTO) of DARPA. Our research team consisting of members from: BAE Systems, Alcatel-Lucent, Massachusetts Institute of Technology, Cornell University and Applied Wave Research reports on the latest developments of the technology to fabricate an application specific, electronic-photonic integrated circuit (AS_EPIC). Now in its second phase of the EPIC program, the team has designed, developed and integrated fourth order optical tunable filters, both silicon ring resonator and germanium electro-absorption modulators and germanium pin diode photodetectors using silicon waveguides within a full 150nm CMOS process flow for a broadband RF channelizer application. This presentation will review the latest advances of the passive and active photonic devices developed and the processes used for monolithic integration with CMOS processing. Examples include multilevel waveguides for optical interconnect and germanium epitaxy for active photonic devices such as p-i-n photodiodes and modulators.

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“…For example, we demonstrate in this paper that the thin Ge photodetectors grown on very high index-contrast SOI waveguides, the dominant design platform adopted in most of the recently demonstrated waveguide-integrated Ge photodetectors, 9,10,[12][13][14]17,18 may not show significant coupling sensitivity to the Ge film thickness, in spite of the Ge film behaving as a waveguide. This condition-insensitive coupling behavior for specific bottom-SOI-waveguide-integrated Ge photodetector cases 9,12,38,39 may be the reason why the study on evanescent wave coupling conditions has received little attention so far, until we address the topic in this paper with more general device design cases. In this paper, we discuss the trend on how the phase-matching-dependent coupling sensitivity is affected by the device design factors.…”

Section: Introductionmentioning

confidence: 99%

Efficient evanescent wave coupling conditions for waveguide-integrated thin-film Si/Ge photodetectors on silicon-on-insulator/germanium-on-insulator substrates

Ahn

Kimerling

Michel

2011

Journal of Applied Physics

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We studied evanescent wave coupling behavior between low index-contrast upper-level waveguides and thin-film Si and Ge photodetectors on SOI and germanium-on-insulator (GOI) substrates, respectively. We present a simple and intuitive leaky-mode phase-matching model using a ray-optics approach to determine the conditions for efficient coupling, both in 2D and 3D structures. It is shown that the presence of leaky modes that are phase-matched between the waveguide and the Si or Ge photodetector layer is the key condition for efficient coupling. Our approach was compared to other methods, such as finite-difference time domain (FDTD)=beam propagation method (BPM) and mode analysis. We report that, depending on the way a waveguide photodetector device is designed, waveguide-to-photodetector coupling efficiency may or may not be critically sensitive to design parameters, such as the photodetector layer thickness. As an example, the stark contrast of coupling behavior in the two most popular Ge photodetector structures integrated with Si rib waveguide versus channel waveguide is shown. The device design factors and the trends that affect such coupling sensitivity are identified and explained in the paper. V

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Advances in fully CMOS integrated photonic devices

Cited by 9 publications

References 0 publications

Shared shuttles for integrated silicon optoelectronics

Shared shuttles for integrated silicon optoelectronics

Process flow innovations for photonic device integration in CMOS

Efficient evanescent wave coupling conditions for waveguide-integrated thin-film Si/Ge photodetectors on silicon-on-insulator/germanium-on-insulator substrates

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