Advanced error-prediction LDPC with temperature compensation for highly reliable SSDs

Abstract

a b s t r a c tTo improve the reliability of NAND Flash memory based solid-state drives (SSDs), error-prediction LDPC (EP-LDPC) has been proposed for multi-level-cell (MLC) NAND Flash memory (Tanakamaru et al., 2012(Tanakamaru et al., , 2013, which is effective for long retention times. However, EP-LDPC is not as effective for triple-level cell (TLC) NAND Flash memory, because TLC NAND Flash has higher error rates and is more sensitive to program-disturb error. Therefore, advanced error-prediction LDPC (AEP-LDPC) has been proposed for TLC NAND Flash memory (Tokutomi et al., 2014). AEP-LDPC can correct errors more accurately by precisely describing the error phenomena. In this paper, the effects of AEP-LDPC are investigated in a 2Ânm TLC NAND Flash memory with temperature characterization. Compared with LDPC-with-BER-only, the SSD's data-retention time is increased by 3.4Â and 9.5Â at room-temperature (RT) and 85°C, respectively. Similarly, the acceptable BER is increased by 1.8Â and 2.3Â, respectively. Moreover, AEP-LDPC can correct errors with pre-determined tables made at higher temperatures to shorten the measurement time before shipping. Furthermore, it is found that one table can cover behavior over a range of temperatures in AEP-LDPC. As a result, the total table size can be reduced to 777 kBytes, which makes this approach more practical.

Quick-low-density parity check and dynamic threshold voltage optimization in 1X nm triple-level cell NAND flash memory with comprehensive analysis of endurance, retention-time, and temperature variation

“…The retention-time is then estimated by evaluating BER of a pre-determined data pattern and referring to a T Retention table. 20,21) The temperature is measured by a thermal sensor in the SSD. BER estimation method is explained in more detail in Sect.…”

“…Also, it is assumed that the V TH shifts by only one state (±1) from the measured data, and the errors caused by the V TH shifts of two or more V TH states are ignored (<0.02%). 20,21) Next, the neighboring cell data in the bit-line (column) direction is also read to cancel out the intercell capacitive coupling. As mentioned previously, inter-cell capacitive coupling in the row direction is ignored in the proposed AEP-LDPC w=o upper=lower cells.…”

Thermal Performance of the Thin Heat Pipe for Cooling of Solid-State Drives

“…Consequently, the heat source of the SSD is concentrated on master control panels and NAND particles due to their small size [12]. Long-term high-speed data reading and writing will cause heat accumulation in the processing area, resulting in the rise in the temperature of the SSDs [13]. Due to the surrounding environment, the size of the heat dissipation space, and other factors, it is hard to dissipate from the SSDs, which means the hard disk keeps working at a high temperature for a long time.…”