Address generation for fpga rams for efficient implementation of real-time video processing systems

Abstract

FPGA offers the potential of being a reliable, and highperformance reconfigurable platform for the implementation of real-time video processing systems. To utilize the full processing power of FPGA for video processing applications, optimization of memory accesses and the implementation of memory architecture are important issues. This paper presents two approaches, base pointer approach and distributed pointer approach, to implement accesses to onchip FPGA Block RAMs. A comparison of the experimental results obtained using the two approaches on realistic image processing systems design cases is presented. The results show that compared to the base pointer approach the distributed pointer approach increases the potential processing power of FPGA, as a reconfigurable platform for video processing systems.

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“…2). Similar work addressing automatic memory sequencer generation for image processing applications is presented in [20] and [21]. Index equation extraction for applications described as nested loops are used to automatically generate a dedicated datapath for all the memory access computations.…”

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