Accurate modeling of gate capacitance in deep submicron MOSFETs with high-K gate-dielectrics

Abstract

Gate capacitance of metal-oxide-semiconductor devices with ultra-thin high-K gate-dielectric materials is calculated taking into account the penetration of wave functions into the gate-dielectric. When penetration effects are neglected, the gate capacitance is independent of the dielectric material for a given equivalent oxide thickness (EOT). Our selfconsistent numerical results show that in the presence of wave function penetration, even for the same EOT, gate capacitance depends on the gate-dielectric material. Calculated gate capacitance is higher for materials with lower conduction band offsets with silicon. We have investigated the effects of substrate doping density on the relative error in gate capacitance due to neglecting wave function penetration. It is found that the error decreases with increasing doping density. We also show that accurate calculation of the gate capacitance including wave function penetration is not critically dependent on the value of the electron effective mass in the gate-dielectric region.

Accurate modeling of Metal/HfO2/Si capacitors

“…Figure 2 shows the normalized capacitance in a DG MOSFET with T Si = 5 nm as a function of V G . It is remarkable that capacitance variation for the two values of m * (0.1m 0 and 0.7m 0 ) is 3% (greater than that obtained by [4] for bulk transistors) and therefore an accurate model of effective mass is needed.…”

“…According to [4], when the same effective mass is considered for both insulators, the charge centroid for the device with a high-κ insulator is lower than in the case with SiO 2 . However, here it is shown that when different effective masses are considered, the behavior can be the opposite.…”

“…It is well known that (1) is not valid anymore when quantum effects are considered [4]. To find the correct EOT considering quantum confinement, we calculated the total The last parameter analyzed in a DG MOSFET was the penetration of the QED into the gate insulator [8].…”

“…Since state-of-the-art devices are in the range of a few nanometers, quantum confinement effects seriously influence their performance and therefore they have to be considered in order to accurately model the C-V characteristics of Metal/Insulator/Silicon (MIS) capacitors [4].…”

An Improved Physically Based Compact C-V Model for MOS Devices with High-K Gate Dielectrics

“…To overcome the serious technology difficulties related to using ultra-thin SiO2 layers as the gate dielectric, alternative high-k materials are being considered as replacement of SiO2. It has been shown recently that the gate C-V characteristics of high-k gate-dielectric MOSFETs are determined by the effects of wave function penetration into the dielectric material [2,3].…”