ACCEL: Automated circuit card etching layout

Fisk, C.J.; Caskey, D.L.; West, L.E.

doi:10.1109/proc.1967.6027

Cited by 39 publications

References 3 publications

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Layout including parasitics for printed circuit boards

Wawryn

1988

Circuit Theory & Apps

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SUMMARYAn automatic layout system is developed for optimal simultaneous placement of elements and equipotential nodes and routing interconnection paths that can be applied to multilayer analogue printed circuit boards (PCBs) including parasitic couplings. The objective is t o minimize the influence of parasitic capacitance and inductance couplings of printed paths on performance of analogue circuits as an electrical criterion. A force model has been used to determine optimal placement where the sensitivities of network function on parasitic capacitances and inductances are the sets of weighted coefficients between forces *of attractions and repulsions. The routing algorithm is a combination of topographic simulation method with minimum length connection path. The topography of predicted parasitic couplings is formed before each connection path is routed where the sensitivities of the network function on parasitic capacitances and inductances create the heights of tops. Placement and routing algorithms have been developed, programmed and compared with conventional force algorithm and the Lee algorithm. Practical results of frequency characteristics of printed circuit boards of a wide-band HF amplifier have been obtained and presented.

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Layout including parasitics for printed circuit boards

Wawryn

1988

Circuit Theory & Apps

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Evaluation of analog printed circuit board wiring routes by surface charge modeling method and applicatuion to the determination of wiring

Kasuga

Konta

Matsuda

1995

Electron Comm Jpn Pt III

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A surface charge modeling method is one of the routing methods based on strategies that minimize network energy. The relationship between potential energy and typical routing criteria is theoretically investigated first. It is concluded that the minimal energy state coincides with the minimal wire length in case of the sufficiently large printed circuit boards (PCBs). Then a procedure for improving wiring starting from an initial wiring which is a minimal route connecting terminal pairs in a straight line is described. This technique has the advantage of not requiring wiring specification priorities and obtaining the wiring routes of the shortest‐path topology.

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Computer‐aided interconnection routing: General survey of the state‐of‐the‐art

Nakahara¹

1972

Networks

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This paper i s a b r i e f survey of the computer-aided i n t e rconnection routing techniques currently i n use a t various f ac i l i t i e s as p a r t of t h e i r software packages. pros and cor2s of t h e techniques avaiZable and also i n d i c a t e s further research areas i n the f u t u r e . Excellent r e v i m papers s i m i l a r to the one presented here have been published previously [26,55,561, which cover a wider range o f subjects on design automation i n general. Many of t h e subjects mentioned i n the above references are deliberately repeated here since the current paper i s intended f o r t u t o r i a l purposes.topics m e urged to read the aforementioned references.

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ACCEL: Automated circuit card etching layout

Cited by 39 publications

References 3 publications

Layout including parasitics for printed circuit boards

Layout including parasitics for printed circuit boards

Evaluation of analog printed circuit board wiring routes by surface charge modeling method and applicatuion to the determination of wiring

Computer‐aided interconnection routing: General survey of the state‐of‐the‐art

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