A VHDL-AMS library of RF blocks models

Milet-Lewis, N.; Monnerie, G.; Fakhfakh, Ahmed; Geoffroy, D.; Hervé, Y.; Lévi, H.; Charlot, J.-J.

doi:10.1109/bmas.2001.962490

Cited by 13 publications

(2 citation statements)

References 2 publications

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“…The need for a behavioral level simulator is strengthened by the characteristic that both the PLL and the ∑-∆ modulator are nonlinear systems. In the literature many papers have studied the implementation of the behavioral models of classical PLL systems and ∑-∆ synthesizers [6][7][8]. However, there are few works that show the full analysis and design of ∑-∆ synthesizers using behavioral modeling.…”

Section: Introductionmentioning

confidence: 99%

Systematic HDL Design of a S-? Fractional-N Phase-Locked Loop for Wireless Applications

Oualkadi

Flandre

2008

2008 IEEE Computer Society Annual Symposium on VLSI

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This paper presents a systematic HDL design of a ∑-∆ fractional-N Phase-Locked Loop based on behavioral modeling. The proposed design consists in describing the mixed behavior of this PLL architecture starting from the specifications of each building block. The HDL models of critical PLL blocks have been described in VHDL-AMS to predict the different specifications of the PLL. The effect of different noise sources has been efficiently introduced to study the PLL system performances. The obtained results are compared with transistor-level simulations to validate the effectiveness of the proposed models.

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Section: Introductionmentioning

confidence: 99%

Systematic HDL Design of a S-? Fractional-N Phase-Locked Loop for Wireless Applications

Oualkadi

Flandre

2008

2008 IEEE Computer Society Annual Symposium on VLSI

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“…Special care has been taken to model the proper non-idealities, while conserving acceptable simulation performances, and to define consistent parameter sets that support the topdown (specification) and bottom-up (back-annotation) phases. Similar model libraries have been already presented, e.g., in [3]- [5], but mostly focus on top-down design only.…”

Section: Introductionmentioning

confidence: 99%

A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems

Maehne

Vachoux

Giroud

et al. 2010

Lecture Notes in Electrical Engineering

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Abstract-This paper presents a modelling methodology for the top-down/bottom-up design of RF systems based on systematic use of VHDL-AMS models. The model interfaces are parameterizable and pin-accurate. The designer can choose to parameterize the models using performance specifications or device parameters back-annotated from the transistor-level implementation. The abstraction level used for the description of the respective analog/digital component behavior has been chosen to a good trade-off between accuracy, fidelity, and simulation performance. These properties make the models suitable for different design tasks such as architectural exploration or overall system validation. This is demonstrated on a model of a binary FSK transmitter parameterized to meet very different target specifications. The achieved flexibility and systematic model documentation facilitate their reuse in other design projects.

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Behavioral modeling methodology applied to power systems tihermal analysis

Martin¹,

Ferrer²

The 8th IEEE International Workshop on Advanced Motion Control, 2004. AMC '04.

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A VHDL-AMS library of RF blocks models

Cited by 13 publications

References 2 publications

Systematic HDL Design of a S-? Fractional-N Phase-Locked Loop for Wireless Applications

Systematic HDL Design of a S-? Fractional-N Phase-Locked Loop for Wireless Applications

A VHDL-AMS Modeling Methodology for Top-Down/Bottom-Up Design of RF Systems

Behavioral modeling methodology applied to power systems tihermal analysis

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