A versatile low-resistance ohmic contact process with ohmic recess and low-temperature annealing for GaN HEMTs

Abstract

Deeply recessed ohmic contacts for GaN-based high electron mobility transistors (HEMTs) are demonstrated. It is shown that low-resistance ohmic contacts can be achieved with recessing beyond the AlGaN Schottky barrier where the ohmic contacts are formed on the sidewall of the recess. This makes the process versatile and relatively insensitive to the exact recess depth. The ohmic contact is based on a gold-free metallization scheme consisting of a Ta/Al/Ta metal stack requiring a low-temperature annealing. Important parameters for this type of ohmic contact process include the metal coverage, slope of the etched sidewall, bottom Ta-layer thickness, as well as annealing temperature and duration. The optimized contact resistance is as low as 0.24 Ω mm after annealing at 575 °C. Moreover, this sidewall contact approach was successfully implemented on different epitaxial heterostructures with different AlGaN barrier thickness as well as with and without AlN exclusion layer. All the samples exhibited excellent contact resistances in a wide range of recess depths. The Ta-based, sidewall ohmic contact process is a promising method for forming an ohmic contact on a wide range of GaN HEMT epitaxial designs.

Optimization of Ohmic Contact for AlGaN/GaN HEMT on Low-Resistivity Silicon

“…Even though the barrier height is low, the absence of 2DEG channel underneath the contact limits carrier tunneling to a smaller region around the sidewall of the recessed barrier. Other work [16] [15] has shown, etching below the channel enhances ohmic performance. This difference is reportedly due to the sidewall angle, metal coverage and metallization.…”

Investigation of Isolation Approaches and the Stoichiometry of SiNx Passivation Layers in “Buffer‐Free” AlGaN/GaN Metal–Insulator–Semiconductor High‐Electron‐Mobility Transistors

“…The gate recess forms the gate length (L g ), which was 2 and 4 μm for Sample A and Sample B, respectively. The ohmic contacts consisted of a 15/280/20 nm Ta/Al/Ta stack, [22,23] which resulted in average contact resistances of 0.44 Ω mm for Sample A and 0.75 Ω mm for Sample B. A 600 nm PECVD SiO x second dielectric was deposited following the ohmic contact formation.…”

Au-free recessed Ohmic contacts to AlGaN/GaN high electron mobility transistor: Study of etch chemistry and metal scheme

“…The 15 cycle recess etch resulted in Ohmic contacts too, but the nonuniformity in electrical characteristics was large across the die, with even adjacent sets of contacts showing widely different behaviors. There is one report 16 stating the necessity of an extensively optimized lithography process to get the required sidewall angle profile of the etch with an Si 3 N 4 hard mask, so that Ohmic contact can be formed by a direct contact mechanism where the metal contacts the 2DEG directly. This is difficult to achieve using a soft mask.…”

“…Some of these reports achieve low contact resistance by using well-engineered metal stacks followed by high temperature post-metal annealing (PMA), [12][13][14] while others use a pre-Ohmic barrier recess etch, which leads to low contact resistance with even a low temperature PMA step. 3,[15][16][17] Many of the reports on the latter method of forming Au-free contacts explain the effect of annealing temperature and time on the contact resistance, but few reports elaborate on the effect of using different recess etch chemistries, recess etch depths, and metallization on the formation of Au-free, low-temperature sputtered Ohmic contacts to AlGaN/GaN HEMTs.…”