Deeply recessed ohmic contacts for GaN-based high electron mobility transistors (HEMTs) are demonstrated. It is shown that low-resistance ohmic contacts can be achieved with recessing beyond the AlGaN Schottky barrier where the ohmic contacts are formed on the sidewall of the recess. This makes the process versatile and relatively insensitive to the exact recess depth. The ohmic contact is based on a gold-free metallization scheme consisting of a Ta/Al/Ta metal stack requiring a low-temperature annealing. Important parameters for this type of ohmic contact process include the metal coverage, slope of the etched sidewall, bottom Ta-layer thickness, as well as annealing temperature and duration. The optimized contact resistance is as low as 0.24 Ω mm after annealing at 575 °C. Moreover, this sidewall contact approach was successfully implemented on different epitaxial heterostructures with different AlGaN barrier thickness as well as with and without AlN exclusion layer. All the samples exhibited excellent contact resistances in a wide range of recess depths. The Ta-based, sidewall ohmic contact process is a promising method for forming an ohmic contact on a wide range of GaN HEMT epitaxial designs.
III-V compounds such as InGaAs, InAs, InSb have great potential for future low power high speed devices (such as MOSFETs, QWFETs, TFETs and NWFETs) application due to their high carrier mobility and drift velocity. The development of good quality high k gate oxide as well as high k/III-V interfaces is prerequisite to realize high performance working devices. Besides, the downscaling of the gate oxide into sub-nanometer while maintaining appropriate low gate leakage current is also needed. The lack of high quality III-V native oxides has obstructed the development of implementing III-V based devices on Si template. In this presentation, we will discuss our efforts to improve high k/III-V interfaces as well as high k oxide quality by using chemical cleaning methods including chemical solutions, precursors and high temperature gas treatments. The electrical properties of high k/InSb, InGaAs, InSb structures and their dependence on the thermal processes are also discussed. Finally, we will present the downscaling of the gate oxide into sub-nanometer scale while maintaining low leakage current and a good high k/III-V interface quality.
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