A Van Der Waals Reconfigurable Multi‐Valued Logic Device and Circuit Based on Tunable Negative‐Differential‐Resistance Phenomenon

Seo, Seunghwan; Cho, Jeong‐Ick; Jung, Kil‐Su; Andreev, Maksim; Lee, Ju‐Hee; Ahn, Hogeun; Jung, Sooyoung; Lee, Taeran; Kim, Byeongchan; Lee, Seojoo; Kang, Juncheol; Lee, Kyeong‐Bae; Lee, Hojun; Kim, Ki-Seok; Yeom, Geun Young; Heo, Keun; Park, Jin‐Hong

doi:10.1002/adma.202202799

Cited by 21 publications

(16 citation statements)

References 31 publications

(30 reference statements)

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“…Ternary logic inverters indicating three logic states are demonstrated by applying heterojunction devices. , In these heterostructure devices, a p-type semiconductor and n-type semiconductor partially form a junction, exhibiting characteristics different from conventional devices called negative differential resistance (NDR) or negative differential transconductance (NDT) . For instance, resonant tunneling diodes have been utilized in logic gate designs to increase data density and reduce power consumption in extremely high frequencies. , Heterojunction transistors (TRs) with NDT characteristics are also of great interest because three-terminal devices offer improved functionality and are easier to integrate into complex integrated circuits (ICs) than two-terminal devices. ,, The NDT phenomenon is the drain current ( I DS ) decreases and then increases again in a specific region during the gate voltage ( V GS ) sweep in their current–voltage ( I DS – V GS ) characteristics.…”

Section: Introductionmentioning

confidence: 99%

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Shin,

Lee,

Jin

et al. 2024

ACS Nano

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Multivalued logic (MVL) technology is a promising solution for improving data density and reducing power consumption in comparison to complementary metal-oxide-semiconductor (CMOS) technology. Currently, heterojunction transistors (TRs) with negative differential transconductance (NDT) characteristics, which play an important role in the function of MVL circuits, adopt organic or 2D semiconductors as active layers, but it is still difficult to apply conventional CMOS processes. Herein, we demonstrate an oxide semiconductor (OS) heterojunction TR with NDT characteristics composed of p-type copper(I) oxide (Cu 2 O) and n-type indium gallium zinc oxide (IGZO) using the conventional CMOS manufacturing processes. The electrical characteristics of the fabricated device exhibit a high I on /I off ratio (∼3 × 10 3 ), wide NDT ranges (∼29 V), and high peakto-valley current ratios (PVCR ≈ 25). The electrical properties of 15 devices were measured, confirming uniform performance in the PVCR, NDT range, and I on /I off ratio. We analyze the device operation by varying the source/drain (S/D) position and changing the device geometry and the thickness of the Cu 2 O layer. Additionally, we demonstrate heterojunction ambipolar TR to elucidate the transport mechanism of NDT devices at a high gate voltage (V GS ). To confirm the feasibility of the MVL circuit, we present a ternary inverter with three clearly expressed logic states that have a long intermediate state and greater margin of error induced by wide NDT regions and high PVCR.

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Section: Introductionmentioning

confidence: 99%

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Shin,

Lee,

Jin

et al. 2024

ACS Nano

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“…So far, significant research efforts have been devoted to realize state-of-the-art optoelectronic synapses utilizing 2D transitionmetal dichalcogenides (TMDs) 6,7 or their heterostructures (HS) for programmable NVM, 8 retinomorphic sensors, 9 and optoelectronic logic applications. 10 However, 2D synapses typically operate with high gate (above V Th ) and programming (V D ) voltages owing to their highly resistive nature, resulting in significant energy consumption. Ferroelectric materials can be energetically promising for low-power ONN applications, as the electrically reversible, remnant polarization field can effectively modulate the channel conductance, thus emulating synaptic plasticity.…”

Section: Introductionmentioning

confidence: 99%

“…In addition, an ORAM can directly receive broad-band visual information without the need for optical-to-electrical signal converters, facilitating an advancement toward simplified photonic circuitry with minimal latency and low energy consumption. So far, significant research efforts have been devoted to realize state-of-the-art optoelectronic synapses utilizing 2D transition-metal dichalcogenides (TMDs) , or their heterostructures (HS) for programmable NVM, retinomorphic sensors, and optoelectronic logic applications . However, 2D synapses typically operate with high gate (above V Th ) and programming ( V D ) voltages owing to their highly resistive nature, resulting in significant energy consumption.…”

Section: Introductionmentioning

confidence: 99%

Graphene-In₂Se₃ van der Waals Heterojunction Neuristor for Optical In-Memory Bimodal Operation

Mukherjee,

Dutta,

Ghosh

et al. 2023

ACS Nano

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Functional diversification at the single-device level has become essential for emerging optical neural network (ONN) development. Stable ferroelectricity harnessed with strong light sensitivity in α-In 2 Se 3 holds great potential for developing ultrathin neuromorphic devices. Herein, we demonstrated an all-2D van der Waals heterostructure-based programmable synaptic field effect transistor (FET) utilizing a ferroelectric α-In 2 Se 3 nanosheet and monolayer graphene. The devices exhibited reconfigurable, multilevel nonvolatile memory (NVM) states, which can be successively modulated by multiple dual-mode (optical and electrical) stimuli and thereby used to realize energy-efficient, heterosynaptic functionalities in a biorealistic fashion. Furthermore, under light illumination, the prototypical device can toggle between volatile (photodetector) and nonvolatile optical random-access memory (ORAM) logic operation, depending upon the ferroelectric-dipole induced band adjustment. Finally, plasticity modulation from short-term to prominent long-term characteristics over a wide dynamic range was demonstrated. The inherent operation mechanism owing to the switchable polarization-induced electronic band alignment and bidirectional barrier height modulation at the heterointerface was revealed by conjugated electronic transport and Kelvin-probe force microscopy (KPFM) measurements. Overall, robust (opto)electronic weight controllability for integrated in-sensor and in-memory logic processors and multibit ORAM systems was readily accomplished by the synergistic ferrophotonic heterostructure properties. Our presented results facilitate the technological implementation of versatile all-2D heterosynapses for next-generation perception, optoelectronic logic systems, and Internet-of-Things (IoT) entities.

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“…Most MVL computing nanodevices are implemented based on the negative differential resistance (NDR) characteristic . The NDR phenomenon is the decrease in current with increasing voltage.…”

Section: Introductionmentioning

confidence: 99%

“…8,9 Most MVL computing nanodevices are implemented based on the negative differential resistance (NDR) characteristic. 10 The NDR phenomenon is the decrease in current with increasing voltage. The PVR is defined as the ratio of the peak current to the valley current in Figure 1b.…”

Section: ■ Introductionmentioning

confidence: 99%

MXene-Based Sc₂CHO/Sc₂NHO/Sc₂CHO Magnetic Tunnel Junctions for Multi-Value Logic Computing Devices: A First Principles Study

Liu

Zhu

Wang

et al. 2023

ACS Appl. Nano Mater.

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The rapid development of technologies such as machine learning and artificial intelligence has further accelerated the growth of multi-value logic (MVL) computing nanodevices. However, current MVL nanodevices based on conventional materials face the challenges of low peak−valley ratio (PVR) and unstable spin filtering effects. Therefore, the intrinsic half-metal nanoscale MXene has become the answer to the development bottleneck of MVL nanodevices for its outstanding properties such as high Curie temperature and an appropriate band structure. The present work attempts to design spintronic magnetic tunnel junctions (MTJs) based on new predicted Sc 2 CHO as half-metallic electrodes and Sc 2 NHO as semiconductor-based scattering regions. Furthermore, we simulate its transport properties from density functional theory combined with nonequilibrium Green's function. And we have considered the effect of the length of the scattering region on MTJ performance. According to our calculations, the spintronic transport of the MTJs demonstrates up to perfect 100% polarizability spin currents stably due to the single-channel conduction capability of half-metal Sc 2 CHO. The MTJs exhibit a significant negative differential resistance (NDR) phenomenon, with the PVR of the type 2N reaching 1.28 × 10 6 , the highest value among the two-dimensional spintronic nanodevices currently being theoretically explored. MTJs with a high PVR will be beneficial for the application and development of MVL nanodevices. The spin filtering effect and NDR phenomenon can be well-maintained as the scattering region length increases, and the PVR usually almost always remains 10 4 . This is well reflected in the transmission spectra and molecular projection self-consistent Hamiltonian. The tunneling magnetoresistance phenomenon is also observed.

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A Van Der Waals Reconfigurable Multi‐Valued Logic Device and Circuit Based on Tunable Negative‐Differential‐Resistance Phenomenon

Cited by 21 publications

References 31 publications

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Graphene-In₂Se₃ van der Waals Heterojunction Neuristor for Optical In-Memory Bimodal Operation

MXene-Based Sc₂CHO/Sc₂NHO/Sc₂CHO Magnetic Tunnel Junctions for Multi-Value Logic Computing Devices: A First Principles Study

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A Van Der Waals Reconfigurable Multi‐Valued Logic Device and Circuit Based on Tunable Negative‐Differential‐Resistance Phenomenon

Cited by 21 publications

References 31 publications

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Graphene-In2Se3 van der Waals Heterojunction Neuristor for Optical In-Memory Bimodal Operation

MXene-Based Sc2CHO/Sc2NHO/Sc2CHO Magnetic Tunnel Junctions for Multi-Value Logic Computing Devices: A First Principles Study

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Product

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About

Graphene-In₂Se₃ van der Waals Heterojunction Neuristor for Optical In-Memory Bimodal Operation

MXene-Based Sc₂CHO/Sc₂NHO/Sc₂CHO Magnetic Tunnel Junctions for Multi-Value Logic Computing Devices: A First Principles Study