A Universal Reversible Gate Architecture for Designing N-Bit Comparator Structure in Quantum-dot Cellular Automata

Bhoi, Bandan Kumar; Misra, Neeraj Kumar; Pradhan, Manoranjan

doi:10.14257/ijgdc.2017.10.9.03

Cited by 6 publications

(11 citation statements)

References 15 publications

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“…Comparator circuits play an important role in digital circuits [9][10][11][12][15][16][17][18]. This circuit compares their two inputs.…”

Section: Qca Comparatormentioning

confidence: 99%

“…There are three basic gates in this technology: inverter gate, majority (M) gate, and XOR gate [3][4]. These gates are building blocks for constructing the logic circuits such as QCA multiplexers [5,7], QCA full address [1-3, 6, 8] and QCA comparators [9][10][11][12][15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

“…On the other hand, the comparator circuits play an important role in digital circuits such as micro controllers [6,12,[15][16][17][18]. Thus, the implementation of high-performance comparator circuits has a great deal of attention, and a lot of effort [10][11][12][15][16][17][18] has been invested in performance improvement in the QCA comparator circuits. Das and De [10] have presented a 1-bit QCA comparator that requires 0.343 µm 2 area and 319 QCA cells.…”

Section: Introductionmentioning

confidence: 99%

“…Ghosh et al [16] have presented a 1-bit QCA comparator circuit that requires 0.06 µm 2 area and 73 QCA cells. Akter et al [17] have presented a 1-bit QCA comparator circuit, which requires 0.11 µm 2 area and 87 QCA cells. Bhoi et al [17] have presented a 1-bit QCA comparator circuit that requires 0.23 µm 2 area and 220 QCA cells.…”

Section: Introductionmentioning

confidence: 99%

“…Akter et al [17] have presented a 1-bit QCA comparator circuit, which requires 0.11 µm 2 area and 87 QCA cells. Bhoi et al [17] have presented a 1-bit QCA comparator circuit that requires 0.23 µm 2 area and 220 QCA cells.…”

Section: Introductionmentioning

confidence: 99%

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Design of efficient coplanar 1-bit comparator circuit in QCA technology

2019

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QCA technology is an emerging and promising technology for implementation of digital circuits in nano-scale. The comparator circuits play an important role in digital circuits. In this work, a new and efficient coplanar 1-bit comparator circuit is proposed and evaluated in the QCA technology. The designed coplanar 1-bit QCA comparator circuit is constructed based on majority gate, XNOR gate and inverter gate that are designed carefully. The functionality of the designed coplanar 1-bit QCA comparator circuit is verified by using QCADesigner version 2.0.3. The obtained results indicate that the designed 1-bit QCA comparator circuit requires 0.03 µm 2 area and 38 QCA cells. It also has 0.5 clock cycles delay. The comparison demonstrates that the designed QCA comparator circuit provides improvements in comparison with other QCA comparator circuits in terms of effective area, cell count, and delay as well as cost.

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“…Comparator circuits play an important role in digital circuits [9][10][11][12][15][16][17][18]. This circuit compares their two inputs.…”

Section: Qca Comparatormentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Design of efficient coplanar 1-bit comparator circuit in QCA technology

2019

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Design of SSG‐1 gate‐based cost‐efficient reversible digital circuits using quantum‐dot cellular automata technology

Bhat

Ahmed

Kakkar

2022

Int J Numerical Modelling

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In recent times, logic circuit designing with quantum‐dot cellular automata (QCA) technology is being comprehensively researched because of its inherent miniature size, ultra‐high speed, low power dissipation, and better switching frequency in the nanoregime. In this paper, QCA implementation of a 3 × 3 SSG‐1 reversible gate is first proposed. This gate is then used to design a reversible full adder, reversible 1‐bit comparator, and reversible 4:2 compressor. To evaluate the performance of the proposed QCA designs, an in‐depth comparison with existing designs has been performed. It is seen that the proposed SSG‐1 gate is efficient from the existing designs which eventually leads to efficient designs of adders, comparator, and compressor digital circuits. To further validate this, these digital circuits have also been compared with the literature and performance improvement is clearly observed in these circuits. In addition to this, energy dissipation analysis of all proposed logic gates and digital circuits is also performed for different kink energy levels using the QCA Pro tool and their respective energy dissipation maps are also obtained. Based on this, it is seen that the proposed designs are cost‐efficient and dissipate less energy which makes them more appropriate for designing higher‐order lower power circuits.

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