Design of SSG‐1 gate‐based cost‐efficient reversible digital circuits using quantum‐dot cellular automata technology

Abstract

In recent times, logic circuit designing with quantum‐dot cellular automata (QCA) technology is being comprehensively researched because of its inherent miniature size, ultra‐high speed, low power dissipation, and better switching frequency in the nanoregime. In this paper, QCA implementation of a 3 × 3 SSG‐1 reversible gate is first proposed. This gate is then used to design a reversible full adder, reversible 1‐bit comparator, and reversible 4:2 compressor. To evaluate the performance of the proposed QCA designs, an in‐depth comparison with existing designs has been performed. It is seen that the proposed SSG‐1 gate is efficient from the existing designs which eventually leads to efficient designs of adders, comparator, and compressor digital circuits. To further validate this, these digital circuits have also been compared with the literature and performance improvement is clearly observed in these circuits. In addition to this, energy dissipation analysis of all proposed logic gates and digital circuits is also performed for different kink energy levels using the QCA Pro tool and their respective energy dissipation maps are also obtained. Based on this, it is seen that the proposed designs are cost‐efficient and dissipate less energy which makes them more appropriate for designing higher‐order lower power circuits.

QCA-Based PIPO and SIPO Shift Registers Using Cost-Optimized and Energy-Efficient D Flip Flop

“…Each clock zone has four distinct phases, i.e., switch, hold, release, and relax. Figure 4 depicts these different clocking zones in QCA [1,26]. The remaining paper is organized as follows: Section 2 presents the literature review of D Flip Flop designs and shift registers highlighting their drawbacks.…”

“…These are the basic blocks for building circuits in QCA. A majority voter gate with three inputs in QCA is presented in Figure 3 [23,25,26].…”

“…These are the basic blocks for building circuits in QCA. A majority voter gate with three inputs in QCA is presented in Figure 3 [23,25,26]. In QCA, clocking plays a substantial part in the proper working of the circuits.…”

“…Each clock zone has four distinct phases, i.e., switch, hold, release, and relax. Figure 4 depicts these different clocking zones in QCA [1,26]. and delivers power to the cells [6,10,14].…”