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DC motors are used in industry extensively due to their high reliability, low cost, simple control of speed and position, low energy consumption and their compatibility with digital systems. There are different methods for controlling the speed of DC motors, mainly armature voltage or field control. In this paper, the speed of a separately excited DC motor is controlled by means of self-tuning fuzzy PID method. Against classic PID controllers in which the [Formula: see text], [Formula: see text] and [Formula: see text] values are constant, and are determined for a specific speed, in a self-tuning PID, [Formula: see text], [Formula: see text] and [Formula: see text] values are varied with the speed variations. In this paper, two distinct systems have been suggested for the control of DC motor. The output is examined and compared using the error and derivative error, or error and integrated error. After that, the most optimum regarding the overshoot value and settling time is selected. Finally, to reduce the overshoot value and the settling time of the system, we combined them. The presented method is simulated by means of the data from a DC motor in MATLAB software and the Simulink environment.

This paper proposes a new cell configuration for quaternary Quantum Cellular Automata (QQCA) based on the calculation of polarization. The proposed QQCA cell is based on a three-particle system that creates instability within a cell in the gate design. Therefore, a single-particle system or binary QCA (bQCA) technology and a two-particle system or Ternary QCA (TQCA) technology have been used to implement quaternary logic. The proposed cell can be implemented in two layers or in one, using input and output drives. According to the dimensions of the proposed model for QQCA and simulation of basic gates, designing with this cell is quite optimal; it requires five cells in the design of the AND and OR gates and two cells in the design of the NOT gate. Based on the number of cells used in the basic gates, the total area in the AND and OR gates is 576 × 10 −6 µm 2 and in the NOT gate is 276 × 10 −6 µm 2 . The base gates are fully optimized and latency is equal to 0.25 clockcycle or 0.25 × 10 −12 s, which is reduced in comparison with prior works. Also, the power consumption of a cell in terms of quantum calculation and the proposed model is also investigated.

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