A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications

Abstract

This paper presents a synthesis methodology for analog systems described using VHDL-AMS language. Synthesis produces net-lists of analog components that are selected from a library, and sized so that specified objectives (like AC response, signal to noise ratio, dynamic range, area) are optimized. The gap between abstract specifications and implementations is bridged using a two-layered methodology. The first layer is architecture generation. The second layer is component synthesis and constraint transformation. Architecture generation employs the branch-and-bound algorithm to create architectural alternatives for a system. Component synthesis and constraint transformation use a directed interval based genetic algorithm that operates on parameter ranges. The performance estimation engine embeds technology process parameters, SPICE models for basic circuits, and symbolic composition equations for basic structural configurations. The paper discusses the VHDL-AMS subset for synthesis. The subset offers the composition semantics. As a result, specifications offer sufficient insight into the system structure to allow automated architecture generation. To justify the flexibility of the methodology, the paper presents results for three case studies, a signal conditioning system, a filter, and an analog to digital converter. Experiments show that constraint-satisfying designs can be synthesized in a short time, at a low cost, and without requesting broad knowledge on analog circuits.

Top-Down Heterogeneous Synthesis of Analog and Mixed-Signal Systems

“…If this evaluation is positive, the algorithm ends. Otherwise, the population of designs is simplified (lines [15][16]. The transformations of all evaluators are put into a set from which a limited number is selected.…”

“…Doboli et al translate a description in an HDL language into an optimized architecture via a signal flow graph by replacing subgraphs by structures stored in a library using a branch-and-bound algorithm or a tabu search method [7,16]. A wide range of architectures can be generated and the tool is not restricted to a predefined set of topologies.…”

Classification of analog synthesis tools based on their architecture selection mechanisms

“…Another approach consists in designing the system down to levels where the performance is more easily estimated, for example using first-order models to speed up the design [95]. Nevertheless, the advantage of using simplified models vanishes if many lower-level choices should be made and the resulting estimation is not accurate enough.…”

“…For example, a branch-and-bound algorithm first generates, based on a set of transformations, all possible filter structures corresponding to a subgraph and then eliminates the topologies for which a large area is estimated [95]. In VASE [11], a tabusearch method is employed to find different architectures for op amp circuits, e.g., to select between blocks operating on voltages or currents.…”

Síntese de CIs analógicos em nível de circuito e sistema utilizando métodos modernos de otimização.

“…Um número reduzido de trabalhos, no entanto, enfoca uma abordagem genérica para criação de arquitetura para circuitos analógicos integrados, como as propostas por Doboli et al (2004) Para facilitar o entendimento do estado da arte, é utilizado neste trabalho o nome "modelos com entrada em nível de circuito" para representar os modelos que usam variáveis de dimensionamento de componentes como entrada do bloco. Por outro lado, os modelos que, uma vez criados, não utilizam variáveis de dimensionamento de componentes como entrada do bloco são chamados "modelos com entrada em nível de sistema".…”