A tunable multi-band/multi-standard receiver front-end supporting LTE

Abdelsalam, Hoda; Hegazi, Emad; Mostafa, Hassan; Ismail, Yehea

doi:10.1109/iscas.2015.7168798

Cited by 3 publications

(3 citation statements)

References 8 publications

(11 reference statements)

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“…The performance of the front‐end blocks utilized in the Verilog‐AMS model is derived from the know how of the previous implementation . Moreover, all the other implementations do not include the capability to identify the incoming RF signal standard. The implementation can estimate the standard but lack the capability to change the received standard dynamically.…”

Section: Performance Results and Discussionmentioning

confidence: 99%

A −40‐dB EVM 20‐MHz subsampling multistandard receiver architecture with dynamic carrier detection, bandwidth estimation, and EVM optimization

Kale

Sturm

Pasupureddi

2019

Circuit Theory & Apps

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Summary In this work, a reconfigurable multistandard subsampling receiver with dynamic carrier frequency detection and system‐level EVM optimizations is proposed. Ideal software defined radio (SDR) receivers promise complete flexibility at the expense of high‐performance analog‐to‐digital converters (ADCs) that are challenging to implement in current technologies for low‐power applications. This scenario leads to the research of digital intensive sampling receivers with discrete‐time signal processing (DTSP) implemented in analog domain. This approach makes it feasible to move channel selection filtering and dynamic gain adaptability from analog to digital domain. The proposed receiver employs subsampling down‐conversion along with subband filters to dynamically detect the carrier frequency of the incoming signal, estimate its bandwidth, and identify if the signal is present in one of the target standard bands. This carrier detection provides a unique capability to reconfigure the receiver dynamically. Additionally, in this work, system‐level EVM optimization is proposed considering frequency synthesizer phase noise, IQ mismatch, sampling frequency selection and block‐level gain, noise, and nonlinearity. The RF front end of the proposed receiver is modeled in Verilog‐AMS whereas the digital signal processing is implemented in Simulink‐Matlab. The complete receiver has been verified to detect and process three different bands belonging to three different standards (GSM, UMTS, and WLAN) with the carrier frequency ranging from 0.9 to 2.5 GHz. Test signals with 4‐QAM modulation, maximum bandwidth of 20 MHz, and input‐dynamic range from –109 to –20 dBm is utilized to demonstrate the receiver performance including an EVM of –40 dB.

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Section: Performance Results and Discussionmentioning

confidence: 99%

A −40‐dB EVM 20‐MHz subsampling multistandard receiver architecture with dynamic carrier detection, bandwidth estimation, and EVM optimization

Kale

Sturm

Pasupureddi

2019

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…Moreover, the AC coupling or DC notch filter was dropped from the Zero-IF architecture. The DC cancellation was achieved by means of I/Q down converter, as shown in section (5). Figure 2 shows the architecture of the proposed receiver.…”

Section: Low If-zero If Multi-standard Architecturementioning

confidence: 99%

“…A tunable quadrature band pass charge sampling filter and a time varying matching network based on impedance translation were used to form a tunable receiver front end [5], although it enhances the linearity and matching but it also increases the complexity of the receiver.…”

Section: Introductionmentioning

confidence: 99%