2016
DOI: 10.1088/1748-0221/11/03/c03017
|View full text |Cite
|
Sign up to set email alerts
|

A time-based front-end ASIC for the silicon micro strip sensors of the P̄ANDA Micro Vertex Detector

Abstract: Das PANDA-Experiment ist eines der Hauptexperimente an der geplanten Beschleunigeranlage FAIR (Facility for Antiproton and Ion Research), welche in Darmstadt errichtet wird. Mit dem Experiment soll die Erforschung der starken Wechselwirkung der Hadronenphysik mittels Antiproton-Proton Vernichtungsreaktionen ermöglicht werden. Der Antiprotonenstrahl mit Impulsen zwischen 1.5 GeV/c to 15 GeV/c erlaubt das Studium eines breiten Physikprogramms, inklusive Untersuchung von Hyperon, Open-Charm und exotischen hadroni… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2

Citation Types

0
2
0

Year Published

2017
2017
2019
2019

Publication Types

Select...
3
1

Relationship

1
3

Authors

Journals

citations
Cited by 4 publications
(2 citation statements)
references
References 44 publications
0
2
0
Order By: Relevance
“…The global controller takes care of the distribution of the configuration for the whole chip and the multiplexing of the data from the individual channels. More details on the architecture can be found in: [7] regarding the analog TDC, [8] concerning the analog front-end, and [9] about the digital domain.…”
Section: Pasta Architecturementioning
confidence: 99%
“…The global controller takes care of the distribution of the configuration for the whole chip and the multiplexing of the data from the individual channels. More details on the architecture can be found in: [7] regarding the analog TDC, [8] concerning the analog front-end, and [9] about the digital domain.…”
Section: Pasta Architecturementioning
confidence: 99%
“…The analog front-end consists of four stages [7]. The first is a charge sensitive amplifier, featuring an integration time of 50 ns with two feedback networks designed to process signals coming from both p-and n-type strips.…”
Section: Chip Architecturementioning
confidence: 99%