“…The phase-locked loop (PLL) based clock generators and frequency multipliers have been widely used in integrated circuit design for microprocessors, digital system-on-chips (SoCs), and wireless communication transceivers [1,2,3,4]. In recent years, multiplying delay-locked loops (MDLLs) [5,6,7,8,9, 10, 11] have been introduced as an alternative to conventional PLLs [1,2,3,4].…”