A Study of the Parallelization of Hybrid SAT Solver using CUDA

Yoo, Taeill; Kim, Sangpil; Yeom, Yongjin; Kang, Ju-Sung

doi:10.14257/astl.2014.48.04

Cited by 6 publications

(2 citation statements)

References 6 publications

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“…In recent years, there have been many solvers based on Compute unified device architecture (CUDA) [ 19 – 23 ] . The solver based on CUDA mainly contains the instruction set architecture of CUDA and the internal parallel computing engine of GPU.…”

Section: Related Workmentioning

confidence: 99%

An Parallel FPGA SAT Solver Based on Multi‐Thread and Pipeline

Zhang

2021

Chinese J of Electronics

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The Boolean Satisfiability (SAT) problem is the key problem in computer theory and application. A parallel multi‐thread SAT solver named pprobSAT+ on a configurable hardware is proposed. In the algorithm, multithreads are executed simultaneously to hide the circuit stagnate. In order to improve the working frequency and throughput of the SAT solver, the deep pipeline strategy is adopted. When all data stored in block random access memory of the field programmable gate array, the solver can achieve maximum performance. If partial data are stored in the external memory, the size of the problem instances the SAT solver can be greatly improved. The experimental results show that the speedup of three‐thread SAT solver is approximately 2.4 times with single thread, and shows that the pprobSAT+ have achieved substantial improvement while a solution is found.

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Section: Related Workmentioning

confidence: 99%

An Parallel FPGA SAT Solver Based on Multi‐Thread and Pipeline

Zhang

2021

Chinese J of Electronics

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“…Meyer et al [12] proposed a massive threaded CUDA 3-SAT solver that featured a pipeline of kernels. Yoo et al [13] proposed a hybrid SAT solver that combined a complete SAT solver with an incomplete selection heuristic running on the GPU. The majority of previous work has focused on determining the applicability of GPUs to SAT solving rather than trying to devise an optimized SAT solver.…”

Section: Future Researchmentioning

confidence: 99%

An Efficient SAT Solving Algorithm Using Pseudo-Conflict Learning and Heterogeneous Computing

Liu

MacCaully

Wang

2015

2015 Third International Symposium on Computing and Networking (CANDAR)

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The Propositional Satisfiability Problem (SAT) is one of the most fundamental NP-complete problems. In this paper, a high-performance and heterogeneous SAT solving algorithm is presented. This algorithm, called CUDA-WSatPcL, uses Pseudo-conflict Learning with a WalkSAT algorithm and exploits a massively parallel architecture on a Graphics Processing Unit (GPU) together with a conventional CPU on NVIDIA's Compute Unified Device Architecture (CUDA) platform. Our experimental results reveal that the heterogeneous and parallelized implementation finds the results up to 25 times faster than our sequential implementation. Additionally, our profiling results show that the improvements depend solely on instance size.

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