A Split-Gate Positive Feedback Device With an Integrate-and-Fire Capability for a High-Density Low-Power Neuron Circuit

Abstract

Hardware-based spiking neural networks (SNNs) to mimic biological neurons have been reported. However, conventional neuron circuits in SNNs have a large area and high power consumption. In this work, a split-gate floating-body positive feedback (PF) device with a charge trapping capability is proposed as a new neuron device that imitates the integrate-and-fire function. Because of the PF characteristic, the subthreshold swing (SS) of the device is less than 0.04 mV/dec. The super-steep SS of the device leads to a low energy consumption of ∼0.25 pJ/spike for a neuron circuit (PF neuron) with the PF device, which is ∼100 times smaller than that of a conventional neuron circuit. The charge storage properties of the device mimic the integrate function of biological neurons without a large membrane capacitor, reducing the PF neuron area by about 17 times compared to that of a conventional neuron. We demonstrate the successful operation of a dense multiple PF neuron system with reset and lateral inhibition using a common self-controller in a neuron layer through simulation. With the multiple PF neuron system and the synapse array, on-line unsupervised pattern learning and recognition are successfully performed to demonstrate the feasibility of our PF device in a neural network.

Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems

“…Though a high VG is applied to the PF neuron device, the ton of the PF neuron device can be delayed due to parasitic capacitors of metal pads and measuring equipment. [27]. In this case, the tons of the PF neuron device in Fig.…”

Low-Power Binary Neuron Circuit With Adjustable Threshold for Binary Neural Networks Using NAND Flash Memory

“…Therefore, the proposed neuron circuit can eliminate the accuracy degradation introduced by the process variation without any CMOS overhead. In addition, the PF device based on a gated-thyristor has a super-steep subthreshold swing (SS) [21]- [23]. Finally, we show that the proposed neuron circuit with the PF device significantly reduces the off-state current of a neuron circuit compared to a neuron circuit with the conventional MOSFET device, thanks to the super-steep SS characteristics of the PF device.…”

Integrate-and-Fire Neuron Circuit Without External Bias Voltages

“…In Table 1 , the CMOS, floating-gate FET and FBFET neuron circuits reported by other research groups require 5–23 elements with capacitors, and more than 1–10 external bias lines which require extra peripheral circuit for generating bias voltages, causing these neuron circuits to consume high power and energy ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ). The FBFET neuron circuit has relatively low energy consumption compared to others except ours, but this neuron circuit requires extra peripheral circuits for generating voltage bias and controllers for the I&F operation ( Choi et al, 2018 ; Kwon et al, 2018 ; Woo et al, 2020 ). The PDSOI MOS-based neuron circuit also requires an external reset circuit applied with changeable gate voltage to reset the membrane potential ( Chavan et al, 2020 ).…”

“…Neuromorphic computing architectures mimicking the human brain have been used to perform pattern recognition, classification, and perception to overcome the crucial issue of power consumption faced by Von-Neumann computing architectures while processing complex data and information ( Chu et al, 2014 ; Merolla et al, 2014 ; Srinivasan et al, 2017 ). Despite their advantages over Von-Neumann computing architectures in terms of energy efficiency, neuron circuits, driven by spiking neural networks (SNNs), still need more power for their integrate-and-fire (I&F) operations than biological neurons ( Choi et al, 2018 ). For most neuron circuits, particularly those using complementary metal-oxide semiconductor (CMOS), feedback field-effect-transistor (FBFET), and floating gate FET (FGFET) ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ), the presence of numerous transistors and external bias lines result in relatively high power consumption for the I&F operations.…”

“…Despite their advantages over Von-Neumann computing architectures in terms of energy efficiency, neuron circuits, driven by spiking neural networks (SNNs), still need more power for their integrate-and-fire (I&F) operations than biological neurons ( Choi et al, 2018 ). For most neuron circuits, particularly those using complementary metal-oxide semiconductor (CMOS), feedback field-effect-transistor (FBFET), and floating gate FET (FGFET) ( Indiveri et al, 2006 ; Kornijcuk et al, 2016 ; Choi et al, 2018 ; Kwon et al, 2018 ; Kim et al, 2019 ; Wang and Khan, 2019 ; Zhang and Wijekoon, 2019 ; Chavan et al, 2020 ; Woo et al, 2020 ), the presence of numerous transistors and external bias lines result in relatively high power consumption for the I&F operations. Thus, for energy-efficient neuron circuits, suppression in numbers of transistors, absence of external bias lines, and use of steep switching devices with extremely low subthreshold swings ( SS s) are needed ( Abbott, 1999 ; Izhikevich, 2003 ; Cheung, 2010 ); the steep switching devices are crucially necessary for a substantial reduction in power consumption of neuron circuits.…”