Low-Power and High-Density Neuron Device for Simultaneous Processing of Excitatory and Inhibitory Signals in Neuromorphic Systems

Abstract

A positive-feedback (PF) neuron device capable of threshold tuning and simultaneously processing excitatory (G +) and inhibitory (G-) signals is experimentally demonstrated to replace conventional neuron circuits, for the first time. Thanks to the PF operation, the PF neuron device with steep switching characteristics can implement integrate-and-fire (IF) function of neurons with low-energy consumption. The structure of the PF neuron device efficiently merges a gated PNPN diode and a single MOSFET. Integrateand-fire (IF) operation with steep subthreshold swing (SS < 1 mV/dec) is experimentally implemented by carriers accumulated in an n floating body of the PF neuron device. The carriers accumulated in the n floating body are discharged by an inhibitory signal applied to the merged FET. Moreover, the threshold voltage (Vth) of the proposed PF neuron is controlled by using a charge storage layer. The low-energy consuming PF neuron circuit (~ 0.62 pJ/spike) consists of one PF device and only five MOSFETs for the IF and reset operation. In a high-level system simulation, a deep-spiking neural network (D-SNN) based on PF neurons with four hidden layers (1024 neurons in each layer) shows high-accuracy (98.55%) during a MNIST classification task. The PF neuron device provides a viable solution for high-density and low-energy neuromorphic systems.

Neural oscillation of single silicon nanowire neuron device with no external bias voltage

“…Neuron circuits using a positive feedback mechanism 15 – 17 reported by other research groups require more than five components and two external bias lines to implement their integration and firing operations. In addition, these neuron circuits 15 , 16 consume substantial energy (2.5 × 10 −13 J and 6.2 × 10 −13 J) while having low firing frequencies (~ 300 Hz and ~ 30 kHz). Although our previous neuron circuit using a positive feedback mechanism 28 had an energy consumption (2.9 × 10 −15 J) lower than our present neuron device (4.5 × 10 −15 J), the latter had a large area occupied by a membrane capacitor and needs one external bias line.…”

Single‐Transistor Neuron with Excitatory–Inhibitory Spatiotemporal Dynamics Applied for Neuronal Oscillations

“…With inhibition, the consumed averaged power is 16.4 nW at 10.9 nA, which is significantly reduced compared to averaged power consumption of a circuit‐based neuron that is in a range of few µW. [ 41 ]…”

“…With inhibition, the consumed averaged power is 16.4 nW at 10.9 nA, which is significantly reduced compared to averaged power consumption of a circuit-based neuron that is in a range of few µW. [41] Compared with other reported experimental solutions, our proposed E-I neuron transistor shows superior bio-realistic performance with ultralow hardware cost (Table S1, Supporting Information), which would serve as a basic processing unit and be well adopted in the highly integrated, energy-efficient neuromorphic systems, enabling truly event-driven asynchronous communication.…”

A Vertical Silicon Nanowire Based Single Transistor Neuron with Excitatory, Inhibitory, and Myelination Functions for Highly Scalable Neuromorphic Hardware

“…[34] The vertical 1T-neuron consumed averaged power of 52.2 nW at I in of 20 nA, which is much smaller compared to averaged power consumption of a circuit-based neuron that is in a range of few µW. [10] In addition to the abovementioned firing characteristics, a leaky characteristic is necessary in an artificial neuron as well as a biological neuron. If there is no leaky characteristic, spikes are generated regardless of the time difference between the previous and current inputs.…”

“…It accepts inhibitory input as well as excitatory input and thus only a specific neuron is fired, as illustrated in Figure 1b. [9][10][11] To realize such neurons in hardware, complex structure has a significant advantage for monolithically integrating a synaptic device, such as RRAM or memristor, over the 1T-neuron (Figure S1, Supporting Information). It is also compatible with the embedded logic of the neuromorphic hardware and it does not require a SOI wafer to form a floating body due to its inherent GAA nature.…”