A spiking neuron implemented in VLSI

Stoliar, Pablo; Akita, Ippei; Schneegans, Olivier; Hioki, Masakazu; Rozenberg, M. J.

doi:10.1088/2399-6528/ac4e2a

Cited by 5 publications

(3 citation statements)

References 16 publications

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“…If sgn(ΔW) > 0, then the Formula W ↑ = G + ↑-G − ↓ was used, while if sgn(ΔW) < 0, then the Formula W ↓ = G + ↓-G − ↑ was used. The reference circuit is based on the TSMC 65 nm CMOS process 40 .…”

Section: Methodsmentioning

confidence: 99%

Synaptic transistor with multiple biological functions based on metal-organic frameworks combined with the LIF model of a spiking neural network to recognize temporal information

et al. 2023

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Spiking neural networks (SNNs) have immense potential due to their utilization of synaptic plasticity and ability to take advantage of temporal correlation and low power consumption. The leaky integration and firing (LIF) model and spike-timing-dependent plasticity (STDP) are the fundamental components of SNNs. Here, a neural device is first demonstrated by zeolitic imidazolate frameworks (ZIFs) as an essential part of the synaptic transistor to simulate SNNs. Significantly, three kinds of typical functions between neurons, the memory function achieved through the hippocampus, synaptic weight regulation and membrane potential triggered by ion migration, are effectively described through short-term memory/long-term memory (STM/LTM), long-term depression/long-term potentiation (LTD/LTP) and LIF, respectively. Furthermore, the update rule of iteration weight in the backpropagation based on the time interval between presynaptic and postsynaptic pulses is extracted and fitted from the STDP. In addition, the postsynaptic currents of the channel directly connect to the very large scale integration (VLSI) implementation of the LIF mode that can convert high-frequency information into spare pulses based on the threshold of membrane potential. The leaky integrator block, firing/detector block and frequency adaptation block instantaneously release the accumulated voltage to form pulses. Finally, we recode the steady-state visual evoked potentials (SSVEPs) belonging to the electroencephalogram (EEG) with filter characteristics of LIF. SNNs deeply fused by synaptic transistors are designed to recognize the 40 different frequencies of EEG and improve accuracy to 95.1%. This work represents an advanced contribution to brain-like chips and promotes the systematization and diversification of artificial intelligence.

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Section: Methodsmentioning

confidence: 99%

Synaptic transistor with multiple biological functions based on metal-organic frameworks combined with the LIF model of a spiking neural network to recognize temporal information

et al. 2023

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“…Figure 10 depicts the neuron model used in this work, based on the original design by [25], but with some modifications for the avoidance of the output spike to be fed into the same neuron, as seen as [24]. Transistors M3, M4, M5 emulate a thyristor with hysteresis by harnessing the fact that PMOS and NMOS have different threshold voltage values (i.e., v THN ̸ = v THP ).…”

Section: Neuron Circuitmentioning

confidence: 99%

Building an Analog Circuit Synapse for Deep Learning Neuromorphic Processing

Juarez-Lora,

Ponce-Ponce,

Sossa-Azuela

et al. 2024

Preprint

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In this article, we propose a circuit to imitate the behavior of a Reward-Modulated Spike-Timing-Dependent Plasticity synapse. When two neurons in adjacent layers produce spikes, each spike modifies the thickness of the common synapse. As a result, the synapse’s ability to conduct impulses is controlled, leading to an unsupervised learning rule. By introducing a reward signal, reinforcement learning is enabled by redirecting the growth and shrinkage of synapses based on signal feedback from the environment. The proposed synapse manages the convolution of the emitted spike signals to promote either the strengthening or weakening of the synapse, which is represented as the resistance value of a memristor device. As memristors have a conductance range that may differ from the available current input range of typical CMOS neuron designs, the synapse circuit can be adjusted to regulate the spike’s amplitude current to comply with the neuron. The circuit described in this work allows for the implementation of fully interconnected layers of neuron analog circuits. This is achieved by having each synapse reconform the spike signal, thus removing the burden of providing enough power from the neurons to each memristor. The synapse circuit was tested using a CMOS analog neuron described in the literature. Additionally, the article provides insight into how to properly describe the hysteresis behavior of the memristor in Verilog-A code. The testing and learning capabilities of the synapse circuit are demonstrated in simulation using the Skywater-130nm process. The article’s main goal is to provide the basic building blocks for Deep Neural Neural Networks relying on spiking neurons and memristors as the basic processing elements to handle spike generation, propagation, and synaptic plasticity.

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“…Artificial neurons have been created using silicon devices [15,16], which have multiple components, nonideal for dense integration and energy efficiency. Si neurons also lack intrinsic stochastic dynamics and are applied for deterministic computation.…”

Section: Introductionmentioning

confidence: 99%

Voltage Pulse Driven VO2 Volatile Resistive Transition Devices as Leaky Integrate-and-Fire Artificial Neurons

Bernussi

Fan

2022

Electronics

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In a hardware-based neuromorphic computation system, using emerging nonvolatile memory devices as artificial synapses, which have an inelastic memory characteristic, has attracted considerable interest. In contrast, the elastic artificial neurons have received much less attention. An ideal material system that is suitable for mimicking biological neurons is the one with volatile (or mono-stable) resistive change property. Vanadium dioxide (VO2) is a well-known material that exhibits an abrupt and volatile insulator-to-metal transition property. In this work, we experimentally demonstrate that pulse-driven two-terminal VO2 devices behave in a leaky integrate-and-fire (LIF) manner, and they elastically relax back to their initial value after firing, thus, mimicking the behavior of biological neurons. The VO2 device with a channel length of 20 µm can be driven to fire by a single long-duration pulse (>83 µs) or multiple short-duration pulses. We further model the VO2 devices as resistive networks based on their granular domain structure, with resistivities corresponding to the insulator or metallic states. Simulation results confirm that the volatile resistive transition under voltage pulse driving is caused by the formation of a metallic filament in an avalanche-like process, while this volatile metallic filament will relax back to the insulating state at the end of driving pulses. The simulation offers a microscopic view of the dynamic and abrupt filament formation process to explain the experimentally observed LIF behavior. These results suggest that VO2 insulator–metal transition could be exploited for artificial neurons.

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A spiking neuron implemented in VLSI

Cited by 5 publications

References 16 publications

Synaptic transistor with multiple biological functions based on metal-organic frameworks combined with the LIF model of a spiking neural network to recognize temporal information

Synaptic transistor with multiple biological functions based on metal-organic frameworks combined with the LIF model of a spiking neural network to recognize temporal information

Building an Analog Circuit Synapse for Deep Learning Neuromorphic Processing

Voltage Pulse Driven VO2 Volatile Resistive Transition Devices as Leaky Integrate-and-Fire Artificial Neurons

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