A software-equivalent SNN hardware using RRAM-array for asynchronous real-time learning

Abstract

Abstract-Spiking Neural Network (SNN) naturally inspires hardware implementation as it is based on biology. For learning, spike time dependent plasticity (STDP) may be implemented using an energy efficient waveform superposition on memristor based synapse. However, system level implementation has three challenges. First, a classic dilemma is that recognition requires current reading for short voltagespikes which is disturbed by large voltage-waveforms that are simultaneously applied on the same memristor for real-time learning i.e. the simultaneous read-write dilemma. Second, the hardware needs to exactly replicate software implementation for easy adaptation of algorithm to hardware. Third, the devices used in hardware simulations must be realistic. In this paper, we present an approach to address the above concerns. First, the learning and recognition occurs in separate arrays simultaneously in real-time, asynchronously -avoiding nonbiomimetic clocking based complex signal management. Second, we show that the hardware emulates software at every stage by comparison of SPICE (circuit-simulator) with MATLAB ® (mathematical SNN algorithm implementation in software) implementations. As an example, the hardware shows 97.5% accuracy in classification which is equivalent to software for a Fisher's Iris dataset. Third, the STDP is implemented using a model of synaptic device implemented using HfO 2 memristor. We show that an increasingly realistic memristor model slightly reduces the hardware performance (85%), which highlights the need to engineer RRAM characteristics specifically for SNN.

Hardware-Friendly Synaptic Orders and Timescales in Liquid State Machines for Speech Classification

“…Analog waveform shaping involves charging/discharging large capacitors followed by signal buffering circuits as drivers [22], [27], [33]. For e.g.…”

Band-to-Band Tunneling Based Ultra-Energy-Efficient Silicon Neuron

“…The network demonstrates state-of-the-art learning performance with recognition accuracy of 96% (Supplementary Information 2). The hardware translation of this SNN is explored extensively in the literature [25][26][27] . The area and energy/spike of the neuron is benchmarked with literature in Table 1.…”

A Spiking Neural Network Based on the Model of VO2–Neuron

“…For pattern recognition problems, various SNN architectures are used, which differ in the number of layers and in the way neurons are connected [14,16]. One of the simplest SNN architectures is a two-layer network (Figure 6a), where image information is supplied to the input (first layer), and one of the neurons associated with a certain class of images is activated at the output (second layer) [42][43][44]. Each of the first layer neurons is connected to each neuron of the second layer through excitatory connections.…”

“…A large number of information coding methods for SNN has been defined: rate coding, rank coding, time to first spike, latency coding, phase coding, population coding, and others [37]. Typically, two-layer neural networks, used to classify images, apply the rate coding method [43,45,46]. However, in the current study, we use the time to the first spike method [37].…”