A small area 8bits 50MHz CMOS DAC for bluetooth transmitter

Abstract

This paper presents a small area CMOS current-steering segmented digital-to-analog converter (DAC) design used in a RF transmitter stage for 2.45GHz Bluetooth applications. The current source design strategy is based on an iterative scheme which variables are adjusted by a simple way, satisfying the requirements, minimizing power consumption and reaching the design specifications. A theoretical analysis of static-dynamic requirements and a new layout strategy of small area consumption for the current-steering DAC design is included. The DAC was designed and implemented in 0.35µm 4M2P CMOS technolyogy. Some performance results obtained through experimental test are: chip active area of only 200µm × 200µm, full scale output current of 700µA at 3.3V power supply, INL=0.3LSB, DNL=0.37LSB, SFDR=58dB for output sine wave frequency of F out = 1MHz and F s = 50MHz sampling frequency, SFDR=52dB for F out = 1MHz and F s = 10MHz.

A tri-level 50MS/s 10-bit capacitive-DAC for Bluetooth applications

“…The sampling rate is decided as 50MS/s like some papers for Bluetooth applications [3] [4]. MIM capacitor array, of which the unit capacitance is around 20fF, is used in this design.…”

“…The power consumption of the CDAC is 350 µW(including the output buffers). Table I shows the measured performance of the fabricated CDAC, and a comparison of reported DAC [4] of which satisfy near performance requirements of our chip. The DAC of paper [3] can be used for a reconfigurable transmitter(WLAN,UMTS,Bluetooth), however the chip power dissipation (2.4mW) and chip area (0.5mm 2 ) are not optimized for only Bluetooth one to maintain output range in other communication systems.…”