A Short Review of Through-Silicon via (TSV) Interconnects: Metrology and Analysis

Wang, Jintao; Duan, Fangcheng; Lv, Ziwen; Chen, Si; Yang, Xiaofeng; Chen, Hongtao

doi:10.3390/app13148301

Cited by 6 publications

(2 citation statements)

References 88 publications

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“…The Through Silicon Via (TSV) technology utilizes the shortest vertical interconnections to establish electrical connections between chips, significantly enhancing the data transfer speed and packaging density between chips. It is a core technology in 3D packaging and provides a viable pathway for 3D integration [1][2][3][4][5][6]. In recent years, with the continuous increase in chip interconnect density, research on the reliability issues of TSV-metal lines has also deepened.…”

Section: Introductionmentioning

confidence: 99%

Research on Crystal Structure Evolution and Failure Mechanism during TSV-Metal Line Electromigration Process

Gong,

Xie,

Chen

et al. 2023

Crystals

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The combined use of Through Silicon Via (TSV) and metal lines, referred to as TSV-metal lines, is an essential structure in three-dimensional integrated circuits. In-depth research into the electromigration failure mechanism of TSV and the microstructure evolution can serve as theoretical guidance for optimizing three-dimensional stacking. This article conducted electromigration experiments on TSV-metal line structural samples at current densities of 1.0 × 105 A/cm2, 5 × 105 A/cm2, and 1 × 106 A/cm2. Additionally, Electron Back Scattered Diffraction (EBSD) technology was employed to systematically investigate the microstructural evolution of the TSV-metal line structure profiles before and after the application of electrical testing. The results indicate that the current induces a change in the crystal orientation at the TSV-metal interface (TSV/metal interface) and the bottom metal line. This phenomenon notably depends on the initial angle between the grain orientation and the current flow direction. When the angle between the current direction and the grain orientations [001] and [010] is relatively large, the crystals are more likely to deviate in the direction where the angle between the grain orientation and the current is smaller. This is because, at this point, the current direction is precisely perpendicular to the <100> crystal plane family, where the atomic density is lowest, and the energy required for electron transport is minimal. Therefore, the current readily rotates in the direction of this crystal orientation. Before the electromigration tests, areas with a high level of misorientation were primarily concentrated at the TSV/metal interface and the corners of the TSV-metal line. However, these areas were found to be more prone to developing voids after the tests. It is conjectured that the high misorientation level leads to elevated stress gradients, which are the primary cause of cracking failures in the TSV-metal line. As the current density increases from 5 × 105 A/cm2 to 1 × 106 A/cm2, the electromigration failure phenomena in the TSV become even more severe.

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Section: Introductionmentioning

confidence: 99%

Research on Crystal Structure Evolution and Failure Mechanism during TSV-Metal Line Electromigration Process

Gong,

Xie,

Chen

et al. 2023

Crystals

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“…In recent years, 3D interconnect metrology requirements are largely driven by the activity in through-silicon vias (TSV) R&D. The 3D multi-chip integration technologies for higher density scaling of transistors uses TSVs to connect devices and power supply sources outside the chips [1][2][3][4][5]. The main challenges in 3D metrology involve measuring TSVs with very high aspect ratios, where the via depth to diameter ratio approaches 10:1-20:1.…”

Section: Introductionmentioning

confidence: 99%

Spectroscopic Reflectometry for Optimizing 3D Through-Silicon-Vias Process

Ku,

Lo,

Lee

et al. 2023

Metrology

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The main challenges in 3D metrology involve measuring TSVs etched with very high aspect ratios, where the via depth to diameter ratio approaches 10:1–20:1. In this paper, we introduce an innovative approach to enhance our in-house spectroscopic reflectometer module by integrating aperture technology, resulting in a substantial amplification of interference signals. Our system offers the flexibility to conduct measurements on an average number of TSVs, individual TSVs, or specific periodic arrays of TSVs. Additionally, we demonstrate the utility of the spectroscopic reflectometer as a non-destructive, high-speed metrology solution for in-line monitoring of TSV etch uniformity. Through a series of experimental trials in a reactive ion etch (RIE) process, we show that leveraging feedback data from the reflectometer leads to marked improvements in etch depth uniformity.

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Void Nucleation in a Through Silicon Via (TSV): Unraveling the Role of Tilt Grain Boundaries Through Atomistic Investigation

Shashaani,

Sepehrband

2024

The Minerals, Metals &Amp; Materials Series

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A Short Review of Through-Silicon via (TSV) Interconnects: Metrology and Analysis

Cited by 6 publications

References 88 publications

Research on Crystal Structure Evolution and Failure Mechanism during TSV-Metal Line Electromigration Process

Research on Crystal Structure Evolution and Failure Mechanism during TSV-Metal Line Electromigration Process

Spectroscopic Reflectometry for Optimizing 3D Through-Silicon-Vias Process

Void Nucleation in a Through Silicon Via (TSV): Unraveling the Role of Tilt Grain Boundaries Through Atomistic Investigation

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