A scalable performance prediction heuristic for implementation planning on heterogeneous systems

The RACECAR heuristic for automatic function specialization on multi-core heterogeneous systems

“…For matrix multiply, the asymptotic analysis reveals that the execution time is proportional to the product of specific dimensions of the input matrices, allowing for the calculated product to be a work metric. Previous work [33] describes other examples of work metric mappings. Although we have been able to find work metrics for many complex scenarios, there will be situations where an effective work metric does not exist.…”

“…Each implementation performance graph specifies the estimated execution time of an implementation invoked with different work metrics, which are abstractions of the function's input parameters. Generation of implementation performance graphs is based on previous work in performance prediction [33]. RACECAR is, by design, not specific for any type of function, and therefore can make no assumptions about the structure of the input/output parameters or the performance characteristics of the implementations.…”

“…To create an implementation performance graph for an implementation, RACECAR utilizes the planner heuristic from [33], which relies on sampling the execution time of the implementation at different work metrics to extrapolate the relationship between work metric and execution time. Note that by relying on actual execution time measurements, the planner heuristic captures all aspects of the execution time.…”

A framework for dynamic parallelization of FPGA-accelerated applications

“…Future work will investigate functions with many implementations, each based on different resources, algorithms, and parallelizations. To generate IPGs, the DPF executes the Implementation Analysis (IA) heuristic [29] before runtime for each kernel function. IA interpolates between measured execution times of statistically important input values to predict execution time for any input.…”