A rolling-shutter distortion-free 3D stacked image sensor with −160dB parasitic light sensitivity in-pixel storage node

Abstract

Conventional CMOS image sensors widely used in products currently on the market are mainly equipped with a rolling exposure function. This rolling exposure causes so-called "Jell-o effect" distortion when capturing a moving target. CMOS image sensors with a global-shutter function are one of the solutions to avoid this distortion. An in-pixel storage node is required to create a global-shutter CMOS image sensor. A floating diffusion and an additional capacitor can be used as an in-pixel storage node [1,2]. The light sensitivity of the in-pixel storage node is specified by the parasitic light sensitivity (PLS), which is the ratio of the light sensitivity of an in-pixel storage node and the light sensitivity of a photodiode. The PLS should be small enough so that the in-pixel storage is not lightsensitive. Artifacts are captured in an image from bright moving objects during read-out if the PLS is not small enough. The PLS of reported global-shutter CMOS image sensors is around -100dB. That would be small enough to use those image sensors in fields where the light source can be controlled. However, for DSC usage, users can easily encounter scenes with bright objects (e.g. sunlight or car headlights). Even if the in-pixel storage node is light-shielded, it is difficult to perfectly protect the in-pixel storage node from photo-generated carriers, as long as the in-pixel storage node and a photodiode are on the same silicon substrate. Meanwhile, 3D stacking technologies have been introduced for image sensors to give them more functionality and improved performance [3,4]. The reported minimum interconnection pitches for image sensors are over 20μm. These technologies do not fit the smaller pixel pitches of the image sensors in recent DSCs. In this paper, we report a rolling-shutter distortion-free 3D stacked image sensor with an in-pixel storage node of -160dB parasitic light sensitivity. The image sensor virtually achieves a global-shutter function using a 4times frame-shutter operation. The image sensor has 2 semiconductor substrates, where 1 substrate has a backside-illuminated photodiode array and the other a storage-node array. The image sensor achieves a PLS level of -160dB. The image sensor has 8.6μm pitched interconnections, and an interconnection yield of over 99.9% is achieved.

Advances on CMOS image sensors

“…1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 In contrast, analog memory is prone to suffer from charge leakages including light-induced current leakage (parasitic light sensitivity) from the p-n junctions of the memory itself (in case of a storage diode) and from the MOS switches. Some techniques to reduce this leakage include light shielding on the memory area; doping profile to allow parasitic light generated carriers to be collect by the photodiode rather than the memory; placement of the memory in an isolated well which compromises the fill-factor or other type of protection layer ; use of CDS techniques (Meynants et al, 2011) and the use of 3D stack designs, where the memory element is on a different, light insensitive substrate (Aoki et al, 2013).…”

A Low-Noise High-Frame-Rate 1-D Decoding Readout Architecture for Stacked Image Sensors

“…Although recent papers have shown that the micro-bump pitch has fallen below 10μm [14], such size would compromise the pixel pitch in case compact, per-pixel ADCs [15] Fig. 4.…”

Multi-storied photodiode CMOS image sensor for multiband imaging with 3D technology

“…This function improves the dynamic range of incident light by modifying the exposure time and adapting it to the light intensity in different wavelength regions. Our novel 3D stacking technology [5][6] enables us such functions and to put top pixels in alignment with bottom pixels to get an exact position to avoid aberrations between images obtained from the top and bottom substrates, which means no extra PDs designated for IR, which would result in a complicated fabrication process and pixels that cannot be used for visual signals, are needed on the same substrate. 3D stacking technology is also useful to achieve other functions like distance measurement or phase difference detection for lens focusing using the pixels in the bottom substrate.…”