Abstract:This work presents a robust background calibration scheme for switched-capacitor (SC) pipelined analog-to-digital converters. A SC multiplying digital-to-analog converter (MDAC) is usually linearized by high-gain capacitive feedback. Its conversion gain can be measured by splitting the input sampling capacitor and injecting a random sequence into the signal path. The magnitude of the random sequence can be extracted later in the digital domain. The use of input-dependent generation of the random sequence can e… Show more
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