A Resilient Routing Algorithm with Formal Reliability Analysis for Partially Connected 3D-NoCs

Salamat, Ronak; Khayambashi, Misagh; Ebrahimi, Masoumeh; Bagherzadeh, Nader

doi:10.1109/tc.2016.2532871

Cited by 47 publications

(21 citation statements)

References 34 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Elevator-first is a deterministic routing algorithm with no limitation in choosing elevators to transfer the packets to the destination layer. ETW [17] is an adaptive routing algorithm for NoCs with partial connectivity. ETW uses one less virtual channel compared to Elevator-first.…”

Section: Related Work 21 Routing Algorithmsmentioning

confidence: 99%

“…This issue highlights the significance of adaptive routing algorithms in such architectures, especially in load balancing for non-uniform traffics. Previous works have considered partial connectivity but they suffer from not being adaptive, imposing packets to move toward specific direction and not being able to use all the elevators in the network [16], [17] and [18].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-theory Based Analytical Verification

Salamat

Khayambashi

Ebrahimi

et al. 2018

IEEE Trans. Comput.

Self Cite

View full text Add to dashboard Cite

2D-NoCs have been the mainstream approach used to interconnect multi-core systems. 3D-NoCs have emerged to compensate for deficiencies of 2D-NoCs such as long latency and power overhead. A low-latency routing algorithm for 3D-NoC is designed to accommodate high-speed communication between cores. Both simulation and analytical models are applied to estimate the communication latency of NoCs. Generally, simulations are time-consuming and slow down the design process. Analytical models provide, within a fraction of the time, nearly accurate results which can be used by simulation to fine-tune the design. In this paper, a high performance and adaptive routing algorithm has been proposed for partially connected 3D-NoCs. Latency of the routing algorithm under different traffic patterns, different number of elevators and different elevator assignment mechanisms are reported. An analytical model, tailored to the adaptivity of the algorithm and under low traffic scenarios, has been developed and the results have been verified by simulation. According to the results, simulation and analytical results are consistent within a 10 percent margin.

show abstract

Section: Related Work 21 Routing Algorithmsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-theory Based Analytical Verification

Salamat

Khayambashi

Ebrahimi

et al. 2018

IEEE Trans. Comput.

Self Cite

View full text Add to dashboard Cite

show abstract

“…To make this possible, each router has to know the addresses of all the vertically connected nodes (elevators), which implies a significant hardware overhead. In their more recent works, the authors have introduced the DynamicQuadrant Partitioning algorithm [14], which uses a constant number of bits per router to select an elevator. This makes the solution more interesting in terms of implementation cost.…”

Section: Related Workmentioning

confidence: 99%

“…The East-then-West (ETW) algorithm [11,14] is a routing algorithm that requires that at least one TSV be placed in the eastmost column in order to guarantee reachability. Due to the routing rules, the set of elevators that can be selected is constrained by the position of the destination.…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips

et al. 2017

View full text Add to dashboard Cite

3D integration can greatly benefit future many-cores by enabling low-latency three-dimensional Network-on-Chip (3D-NoC) topologies. However, due to high cost, low yield, and frequent failures of Through-Silicon Via (TSV), 3D-NoCs are most likely to include only a few vertical connections, resulting in incomplete topologies that pose new challenges in terms of deadlockfree routing and TSV assignment. The routers of such networks require a way to locate the nodes that have vertical connections, commonly known as elevators, and select one of them in order to be able to reach other layers when necessary. In this paper, several alternative TSV selection strategies requiring a constant amount of configurable bits per router are introduced. Each proposed solution consists of a configuration algorithm, which provides each router with the necessary information to locate the elevators, and a routing algorithm, which uses this information at runtime to route packets to an elevator. Our algorithms are compared by simulation to highlight the advantages and disadvantages of each solution under various scenarios, and hardware synthesis results demonstrate the scalability of the proposed approach and its suitability for cost-oriented designs.

show abstract

Probabilistic Verification for Reliable Network-on-Chip System Design

Lewis

Hartmanns

Basu

et al. 2019

Lecture Notes in Computer Science

View full text Add to dashboard Cite

The design of modern network-on-chip (NoC) systems faces reliability challenges due to process and environmental variations. Peak power supply noise (PSN) in the power delivery network of a NoC device plays a critical role in determining reliable operations: PSN typically leads to voltage droop, which can cause timing errors in the NoC router pipelines. Existing simulation-based approaches cannot provide rigorous, worst-case reliability guarantees on the probabilistic behaviors of PSN. To address this problem, this paper takes a significant step in formally analyzing PSN in modern NoCs. Specifically, we present a probabilistic model checking approach for the rigorous characterization of PSN for a generic central router of a large mesh-NoC system, under the Round Robin scheduling mechanism with a uniform random network traffic load. Defining features for PSN are extracted at the behavioral level to facilitate property formulation. Several abstract models have been derived for the central router's concrete model based on the observations of its arbiter's conflict resolution behavior. Probabilistic modeling and verification are performed using the Modest Toolset. Results show significant scalability of our abstract models, and reveal key PSN characteristics that are indicative of NoC design and optimization.

show abstract

A Resilient Routing Algorithm with Formal Reliability Analysis for Partially Connected 3D-NoCs

Cited by 47 publications

References 34 publications

LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-theory Based Analytical Verification

LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-theory Based Analytical Verification

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips

Probabilistic Verification for Reliable Network-on-Chip System Design

Contact Info

Product

Resources

About