A Radiation Imaging Detector Made by Postprocessing a Standard CMOS Chip

Abstract

An unpackaged microchip is used as the sensing element in a miniaturized gaseous proportional chamber. This letter reports on the fabrication and performance of a complete radiation imaging detector based on this principle. Our fabrication schemes are based on wafer-scale and chip-scale postprocessing. Compared to hybrid-assembled gaseous detectors, our microsystem shows superior alignment precision and energy resolution, and offers the capability to unambiguously reconstruct 3-D radiation tracks on the spot.

Gridpix - Chip Post-processing

“…Important manufacturing considerations are the relatively large vertical dimensions and the high voltages. The process technology for InGrids is detailed in [6].…”

“…As miniaturization offers many advantages for a radiation detection system, such as low mass, low cost per readout channel, and high rate capability, it is an area of active research. In recent years a variety of micropattern gaseous detectors were proposed and realized, such as the MicroStrip Gas Chamber (MSGC) [3], Micromegas [4], Gas Electron Multiplier (GEM) [5], and InGrid (see [6] and references therein).…”

Photon imaging using post-processed CMOS chips

“…Blanco Carballo and co-workers. Good references are their theses [37,67] and publications such as [68,69]. ese detectors where initially used for the imaging of ionizing radiation by detection of single, individual free electrons, both for 2D imaging as well as for 3D reconstruction using a Time Projection Chamber (TPC) [37].…”

“…Most important in this respect is the maximum temperature during processing. To preserve CMOS interconnect integrity the temperature should not exceed 400-450 • C. e temperature needed to fabricate the SU-8 polymer support structure does not exceed 95 • C. e sputtering process needed for metal deposition has also been found to be compatible with the underlying chips [68]. Other aspects that need to be considered are the preservation of the hydrogen passivation, prevention of charge build up and related device degradation during the course of plasma processing and device degradation due to chemical impurities that can be introduced into the CMOS structure.…”

Solar cells on CMOS chips as energy harvesters : integration and CMOS compatibility

“…It is designed to be ball-grid-connected to a semiconductor sensor layer (e.g. CdTe) and also employed in other twodimensional radiation imaging detectors [111,112].…”