A physical compact model of DG MOSFET for mixed-signal circuit applications - part I: model description

Pei, Guangsheng; Ni, Weiping; Kammula, A.V.; Minch, B.A.; Kan, Edwin C.

doi:10.1109/ted.2003.817481

Cited by 34 publications

(12 citation statements)

References 25 publications

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“…This V T linear variation of the threshold voltage and other peculiarities of IDG MOSFETs, such as the gain in sensitivity to V Gb , can be practically used for circuit applications such as signal mixers and memory cells. [1][2][3][4][5] Figure 3 shows that the quantum threshold voltage is always higher than the classical one owing to quantum confinement that causes electron density reduction in the silicon film. We also note that the classical and quantum threshold voltages are nearly equal when V Gb reaches V Gf ¼ V T , i.e., when E xC tends to zero.…”

Section: Resultsmentioning

confidence: 99%

“…Despite excellent electrical performance characteristics due to its multiple conduction surfaces, conventional DG MOSFETs allow only threeterminal operation because the two gates are tied together. DG structures with independent gates have been recently proposed, [1][2][3][4][5] allowing a four-terminal operation. Independent DG (IDG) MOSFETs offer additional advantages, such as dynamic threshold voltage control by one of the two gates and transconductance modulation, in addition to the conventional switching operation.…”

Section: Introductionmentioning

confidence: 99%

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Simulation Analysis of Quantum Confinement and Short-Channel Effects in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Moreau

Munteanu

Autran

2008

jjap

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A two-dimensional (2D) numerical simulation code of drain current including self-consistent solving of the Schrödinger and Poisson equations coupled with the drift-diffusion transport equation in double-gate (DG) metal-oxide-semiconductor fieldeffect transistor (MOSFET) devices has been developed. This code has been used to investigate the operation of independent DG (IDG) MOSFETs compared with classical DG MOSFETs in terms of short-channel effects (SCEs) and carrier quantum confinement. Simulations show that IDG MOSFET operation is different from that of DG MOSFETs due to the presence of a transverse electric field in the first structure that induces significant enhancement of quantum mechanical confinement. This leads to subthreshold performance degradation and to SCE enhancement in IDG MOSFETs compared with DG MOSFETs. We show that, in contrast to DG MOSFETs, quantum confinement effects must be taken into account in IDG MOSFET operation even for thick silicon films (>10 {15 nm).

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Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Simulation Analysis of Quantum Confinement and Short-Channel Effects in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Moreau

Munteanu

Autran

2008

jjap

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“…Independently driven DG (IDG) devices offer additional potentialities, such as a dynamic threshold voltage control by one of the two gates, transconductance modulation, signal mixing, in addition to the conventional switching operation. [16][17][18][19][20] Thus, IDG MOSFETs are promising for future high-performance and low-power-consumption very large scale integrated circuits. However, one of the identified challenges for IDG MOSFET optimization remains the development of compact models [17][18][19]21,22) taking into account the main physical phenomena (such as short-channel effects, quantum confinement, and ballistic transport) governing the devices at this scale of integration.…”

Section: Introductionmentioning

confidence: 99%

“…[16][17][18][19][20] Thus, IDG MOSFETs are promising for future high-performance and low-power-consumption very large scale integrated circuits. However, one of the identified challenges for IDG MOSFET optimization remains the development of compact models [17][18][19]21,22) taking into account the main physical phenomena (such as short-channel effects, quantum confinement, and ballistic transport) governing the devices at this scale of integration. Modeling the IDG MOSFET operation is a difficult task owing to the effect of the second gate that can be independently switched.…”

Section: Introductionmentioning

confidence: 99%

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Quantum Compact Model of Drain Current in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Munteanu

Autran

Moreau

2011

Jpn. J. Appl. Phys.

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A continuous compact model of drain current in independently driven double-gate (IDG) metal–oxide–semiconductor field-effect transistors (MOSFETs) is presented. The model describes drift-diffusion transport and is continuous over all operation regimes, which makes it very suitable for implementation in circuit simulators. Our approach takes into account two-dimensional (2D) electrostatics and vertical carrier quantum confinement in the channel through the inversion charge evaluated quantum-mechanically. The model effectively reproduces the threshold voltage and the current modulation by the back-gate bias, as well as the quantum confinement effects on the inversion charge. A full 2D quantum–mechanical numerical simulation code (solving the 2D Poisson equation self-consistently coupled with the 1D Schrödinger equation) is used to validate the model. The model is shown to fit with good accuracy the numerically simulated quantum drain current in double-gate devices with either independent or connected gates.

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An efficient neural network approach for nanoscale FinFET modelling and circuit simulation

Alam¹,

Kranti²,

Armstrong³

2009

Int J Numerical Modelling

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SUMMARYThe present paper demonstrates the suitability of artificial neural network (ANN) for modelling of a FinFET in nano-circuit simulation. The FinFET used in this work is designed using careful engineering of source-drain extension, which simultaneously improves maximum frequency of oscillation f max because of lower gate to drain capacitance, and intrinsic gain A V0 ¼ g m =g ds , due to lower output conductance g ds . The framework for the ANN-based FinFET model is a common source equivalent circuit, where the dependence of intrinsic capacitances, resistances and dc drain current I d on drain-source V ds and gate-source V gs is derived by a simple two-layered neural network architecture. All extrinsic components of the FinFET model are treated as bias independent. The model was implemented in a circuit simulator and verified by its ability to generate accurate response to excitations not used during training. The model was used to design a low-noise amplifier. At low power (J ds $10 mA/mm) improvement was observed in both third-order-intercept IIP 3 ($10 dBm) and intrinsic gain A V0 ($20 dB), compared to a comparable bulk MOSFET with similar effective channel length. This is attributed to higher ratio of first-order to thirdorder derivative of I d with respect to gate voltage and lower g ds in FinFET compared to bulk MOSFET.

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A physical compact model of DG MOSFET for mixed-signal circuit applications - part I: model description

Cited by 34 publications

References 25 publications

Simulation Analysis of Quantum Confinement and Short-Channel Effects in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Simulation Analysis of Quantum Confinement and Short-Channel Effects in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

Quantum Compact Model of Drain Current in Independent Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors

An efficient neural network approach for nanoscale FinFET modelling and circuit simulation

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