A Parallel Circuit Model for Multi‐State Resistive‐Switching Random Access Memory

Resistance random access memory (RRAM) is an attractive candidate for future non-volatile memory due to its superior features. As the oxide thickness is scaled down, the charge transport mechanism is also subject to the transition from hopping to tunneling dominant process, which is critically related to the interfacial electronic band structure. A TaOx/TaON double layer-based RRAM is fabricated and characterized in this work. Upon TaON insertion at the lower interface, the improved switching behavior is observed. The TaON at the bottom electrode interface blocks oxygen vacancy percolation due to strong N-O bonds and also modifies interfacial band alignment to lower the injected electron energy from bottom electrode due to higher tunneling barrier height than that of TaOx/Pt. This study suggested that a defect-minimized insertion layer like TaON with a proper interfacial band alignment is pivotal in RRAM for the effective ionic control of carrier tunneling resulting in non-linear I-V behavior with improved properties.

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confidence: 99%

Resistive switching of a TaOx/TaON double layer via ionic control of carrier tunneling

Jeon

Park

Jang

et al. 2014

“…1 RRAM can also exhibit >2 resistance states that may promise multi-bit storage. [2][3][4][5][6][7][8] In principle, if each single cell can display 2 N distinguished states, then for the same storage capacity the required die area will scale with 1/N. Stated alternatively, for the same die area, each 2 N -state layer of a 2D memory has the same storage capacity of N 2-state layers of a 3D memory.…”

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confidence: 99%

“…2,7 The fact that these approaches seem to be applicable to all types of RRAM, irrespective of their underlying switching/conduction mechanisms, suggests a common understanding of their existence and control may be possible. However, no such understanding has been provided to-date.…”

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confidence: 99%

“…[7][8][9][10] Such RRAM exhibits several outstanding properties including excellent uniformity with small variations in switching voltages and resistance values, thus possibly providing highly reproducible multilevel states. 10 Although nanometallic RRAM can be implemented using a large variety of insulator:metal pairing, here we focus on Si 3 N 4 :Cr films (10 nm thick) with a Mo bottom electrode and a Pt top electrode (left inset in Figure 1(a)).…”

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confidence: 99%

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Demonstration and modeling of multi-bit resistance random access memory

Yang

Chen

Choi

et al. 2013

Self Cite

Although intermediates resistance states are common in resistance random access memory (RRAM), two-way switching among them has not been demonstrated. Using a nanometallic bipolar RRAM, we have illustrated a general scheme for writing/rewriting multi-bit memory using voltage pulses. Stability conditions for accessing intermediate states have also been determined in terms of a state distribution function and the weight of serial load resistance. A multi-bit memory is shown to realize considerable space saving at a modest decrease of switching speed.

“…(16) to find R E (I,J). After subtracting R E (I,J) from R(I,J,), we obtain R F (I,J,) for all the devices in this favorable case.…”

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confidence: 99%

Probing material conductivity in two-terminal devices by resistance difference

Chen

2017

It is generally impossible to separately measure the resistance of the functional component (i.e., the intrinsic device materials) and the parasitic component (i.e., terminals, interfaces and serial loads) in a two-terminal device. Yet such knowledge is important for understanding device physics and designing device systems. Here, we consider a case where an electric current, temperature, or magnetic field causes a small but identical relative conductivity change ∆σ/σ of the device materials. We find an exact solution to this relative change by a simple resistance-data analysis of similarly configured two-terminal devices.The solution is obtainable even if the change is quite small, say, less than 0.1%. In special cases of small relative changes in parasitic resistance, the absolute parasitic resistance is also obtainable. Our method is especially useful for studying the switching and transport characteristics of the emergent non-volatile resistance memory.