A novel Silicon on Insulator MOSFET with an embedded heat pass path and source side channel doping

Karbalaei, Mohammad; Dideban, Daryoosh

doi:10.1016/j.spmi.2015.12.001

Cited by 25 publications

(5 citation statements)

References 11 publications

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“…We activated this recombination model along with SRH model to let ATLAS calculate recombination in SOI-MOSFETs using above relations simultaneously like literature. 4,29,30 FLDMOB model was added to consider field dependent mobility according to following relation: 30 [4] where E is the parallel electric field and μ n0 and μ p0 are the low-field electron and hole mobilities respectively. The BETAN and BETAP parameters are user-definable and their amounts are 2 and 1, by default.…”

Section: Gr-soi Structurementioning

confidence: 99%

“…With scaling, serious problems including high leakage current, short channel effects (SCE), high power consumption and self-heating effects (SHE)occur for nano-MOSFETs, and these effects degrade device electrical characteristics. [1][2][3][4][5][6][7] Therefore, there is a consensus in the community that, MOSFET scaling is approaching to its limits, and it is necessary to introduce new materials, structures and device concepts to continue performance improvement. 1,8,9 For this, to solve aforementioned problems, variety of structures with interesting architectures have been proposed, including FINFET structures, 10 tunnel field effect transistor (TFET) structures, 11 nanowires 12 and ground plane concept 10,13 beside doping engineering in the silicon film, 14 workfunction/dielectric engineering in the gate region 15 and buried oxide (BOX) engineering.…”

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confidence: 99%

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A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

Karbalaei

Dideban

2019

ECS J. Solid State Sci. Technol.

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In this paper we improve the electrical characteristics of a short channel silicon on insulator metal-oxide-semiconductor-filed-effecttransistor (SOI-MOSFET), with a graphene sheet incorporated on top of the channel (under oxide) close to the source side and a proportionally p-type retrograde doping region which is embedded almost in the middle of the channel. Because graphene sheet and retrogradedoping are simultaneously utilized in the channel, this structure is called "GR-SOI" transistor. Retrograde dopingcauses impurity scattering in the depth of the channel and it virtually decreases the silicon channel thickness. Since graphene sheet has a small bandgap and high mobility, we use it to virtually reduce the channel length, and enhance the ON-current. An immense comparison among our proposed structure (GR-SOI), a structure similar to GR-SOIbut without graphene (R-SOI), and a conventional structure (C-SOI), shows that our proposed device presentssuperior electrical characteristics and reliability compared with its counterparts. Moreover, we investigate the optimum place for locating the graphene sheet along the channel. The obtained results for the drive current, leakage current, subthreshold swing and maximum transconductance are 7.6 mA, 10 pA, 86 mV/dec and 18.5 mS, respectively. Our simulations indicate GR-SOI transistor can be a serious candidate for digital and analog applications.

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Section: Gr-soi Structurementioning

confidence: 99%

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confidence: 99%

A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

Karbalaei

Dideban

2019

ECS J. Solid State Sci. Technol.

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“…According to Moore's law, however, it is unlikely that CMOS devices will retain their advantage due to short‐channel effects (SCEs). Although many recent papers present a modified version of metal–oxide–semiconductor field‐effect transistor (MOSFET)‐based structures to improve electrical performance, SCEs are still a significant obstacle for these new structures …”

Section: Introductionmentioning

confidence: 99%

Proposal of an Embedded Nanogap Biosensor by a Graphene Nanoribbon Field‐Effect Transistor for Biological Samples Detection

Anvarifard

Ramezani

Amiri

2019

Physica Status Solidi (a)

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Herein, it is examined how a graphene nanoribbon field‐effect transistor (GNRFET) can be a useful nanoscale device, along with how to use an embedded nanogap inside a top gate oxide to form a biosensor. A streptavidin–biotin binding system with the dielectric constant of 2.1 is considered as a biological test sample for detection. Introducing the biological sample to the nanogap without a buffer solution modifies the electrostatic modulation in the graphene sheet, resulting in a change in the drain current. The order of change in the drain current is considered a criterion to measure the sensitivity of the proposed biosensor. A detailed investigation and discussion of the biasing conditions during the detection process reveal the optimal bias for the proposed biosensor to achieve a greater sensitivity, all while maintaining a desirable electrical performance.

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“…11 The most important drawback of the SOI technology is increasing temperature in the device. [12][13][14][15] In the SOI technology the SiO 2 material blocks the heat transfer from the active region to the substrate. In this condition, the heat remains in the top silicon layer and the lattice temperature increases.…”

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Using Hetro-Structure Window in Nano Scale Junctionless SOI MOSFET for High Electrical Performance

Mehrad

Zareiee

2021

ECS J. Solid State Sci. Technol.

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A new junctionless MOS transistor is proposed in this paper using hetro-structure technology. A T-shape SiGe is applied under the source and channel region to extend the depletion region in the device. The Si(1−x)Gex region with a mole fraction of x = 0.3 for the germanium, changes the surface potential of the device due to the different band gap than silicon. Off-current in the proposed SiGe region in buried oxide of Junctionless SOI-MOSFET (SG-JLMOS) reduces significantly as it is compared to the Conventional Junctionless SOI-MOSFET (C-JLMOS). Also, using a window with higher thermal capability than silicon dioxide reduces maximum lattice temperature in the active region. In this situation, the reliability of the device increases and the better performance of the transistor is achieved in high temperature. Our simulation with 2D ATLAS simulator shows that DIBL and subthreshold swing have lower values in the proposed SG-JLMOS. So, short channel effects which are the vital parameters in the nano scale device are controlled, considerably.

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A novel Silicon on Insulator MOSFET with an embedded heat pass path and source side channel doping

Cited by 25 publications

References 11 publications

A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

A Scheme for Silicon on Insulator Field Effect Transistor with Improved Performance using Graphene

Proposal of an Embedded Nanogap Biosensor by a Graphene Nanoribbon Field‐Effect Transistor for Biological Samples Detection

Using Hetro-Structure Window in Nano Scale Junctionless SOI MOSFET for High Electrical Performance

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