A Novel Design Flow for Dummy Fill Using Boolean Mask Operations

Luo, Tseng-Chin; Chao, Mango C.-T.; Fisher, Philip A.; Kuo, C. H.

doi:10.1109/tsm.2012.2190431

Cited by 2 publications

(1 citation statement)

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“…To address this, foundries typically place dummy patterns on masks (a process referred to as dummification) to improve uniformity of processes, such as, Deep Reactive Ion Etching, Photolithography, Chemical Mechanical Polishing, Depositions, or Metallization's [2]. A slight modulation of features on mask can alter the uniformity of processes that can have significant impact on device and circuit performance.…”

Section: Introductionmentioning

confidence: 99%

ARIA: Additive ReRAM-based Integrity and Aging Monitoring for ICs

et al. 2024

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This paper reports an approach for monitoring aging and integrity of CMOS circuits through additively manufactured Resistive Random-Access Memory (ReRAM) based test structures. MgO-based ReRAM devices demonstrated excellent temperature sensing and aging modalities with simultaneous storage of sensed temperature and age as a change in the resistive state. The Process Voltage Temperature (PVT) characteristics, aging, and temperature sensitivity of MgO-ReRAM devices were experimentally studied and modeled to capture resistance distributions and temperature-based modalities. This inmemory sensing feature of ReRAM was integrated with specially designed read circuitry using 180 nm CMOS technology, to produce a measurable change in spiking-frequency over the lifetime of the ReRAM under normal aging conditions with the underlying CMOS circuits. Large feature sizes were used so these circuits can be fabricated in-house in trusted foundry. Temporal changes in temperature of underlying CMOS circuit could be captured by instantaneous change in resistive state of ReRAM with local temperature fluctuations which translated to a change in read circuit output. The characteristics of this circuit is studied in detail using simulations. Due to additive integration of ReRAM and associated circuitry, this approach for aging and integrity monitoring (AIM) ensures large spatial and accurate temporal monitoring of underlying CMOS die with minimal loss of the functional chip area for these added security features. The passive, in-memory sensing, and non-volatile nature of ReRAM also ensures low-power consumption in these circuits. The devices resistance states and material composition are specific to every device preventing reverse engineering and tampering of the devices, thus making it an attractive approach for adding customized security and trust features in advanced CMOS nodes-based circuits.

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Section: Introductionmentioning

confidence: 99%