This paper presents an approved automated design of analog multi-rate switched-capacitor (SC) filters using the constrained optimization approach with equality constraints. The procedure can optimally distribute a variety of capacitance values in the input branches of individual SC filter, by minimizing the overall capacitor spread while simultaneously to achieve minimum total capacitor area. Compared to the traditional design methods, this method can simplify and approve the design processes, and make it easy to carry out the automatic implementation, while maintaining the same frequency responses. For demonstrating the efficiency of this modeling, a design procedure of a 2nd order SC decimator is presented in this paper.