A Novel 4×4 Universal Reversible Gate as a Cost Efficient Full Adder/Subtractor in Terms of Reversible and Quantum Metrics

Abstract

Abstract-This paper proposes a new 4×4 reversible logic gate which is named as MOG. Reversible gates are logical basic units, having equal number of input and output lines, which can reduce power dissipation in digital systems design through their reversibility feature; because there is a one-to-one corresponding between their input and outputs vectors. The most significant aspect of the MOG gate is that it is a universal gate and has the ability of calculating any logical function on its own. We have also proposed quantum representation of the MOG gate with optimal quantum cost equal to 11. Then, it has been proved that MOG gate can be used to produce a cost efficient reversible full adder/subtractor cell in terms of reversible and quantum metrics. The proposed reversible full adder/subtractor design using MOG gate is a completely optimized circuit in terms of the number of reversible gates, the number of constant inputs, and the number of garbage outputs because it can work with the minimum possible amounts of these reversible metrics. Additionally, it is more efficient than the existing counterparts in terms of quantum cost. The full adder/subtractor cell is an important circuit in VLSI and digital signal processing applications. A lot of works have been done toward designing reversible full adder/subtractors in the literature; but there is no an optimized design with quantum implementation. To prove the applicability of the proposed design in large processing scales, we have constructed 8-bits reversible ripple carry full adder/subtractor circuit using MOG gates. Results have shown the superiority of our proposed design compared with other 8-bits similar designs.

Reversible Logic Synthesis of Modulo Operation using an Optimized Parallel Binary Adder/Subtractor

“…The above tables validate that the proposed design is optimized under quantum cost and number of garbage outputs. Also, the design has been implemented using existing reversible gates unlike the design proposed by Moghimi [8].…”

“…It maps |0 to |1 and |1 to |0. It is represented by the Pauli matrix: The one and four bit implementation of the parallel adder/subtractor by Moghimi [8] is shown below. Sel is used as the control line for performing addition or subtraction operation.…”

“…The design consists of two Feynman gates and two Peres gates. The number of inputs is same as that of Moghimi [8] consisting of Ctrl, A,B and ‫ܥ‬ .…”

New Design of Reversible Full Adder/Subtractor Using R Gate

“…Eqn. 6 shows the functionality of the T 3 gate. The circuit representation of the T 3 gate is shown in Fig.…”

“…A new reversible gate called N R gate is introduced in [7], then used to designed an optical reversible full adder and subtractor, composed of two NR gates. A new 4 × 4 reversible gate called M OG gate, which can be used by itself as a full adder/subtractor, is introduced in [6]. The M OG gate is constructed from two C gates, one Fredkin gate and one Peres gate.…”