A New Wafer Level Packaging Approach: Encapsulation, Metallization and Laser Structuring for Advanced System in Package Manufacturing

Abstract

One of the general trends in microelectronics packaging is the constant miniaturization of devices. This has led to the development of maximum miniaturization of components on Si level, i.e., CSPs and Flip Chips. To further integrate more functionality into devices, and to further increase the degree of miniaturization, packaging development focus is switching from single chip packaging to the realization of systems in package, SiPs. Two main approaches do exist to realize this goal: one is to integrate all components into one dedicated package, yielding maximum miniaturization for a special application, but little flexibility as far as system design is concerned. The other is to create modular stackable components that can be assembled into a functional system. This integrates both flexibility in system design by exchangeable components and increased reliability potential, as single components can be tested separately. This last approach was considered a promising choice for the generation of SiPs. Within this paper a packaging process is introduced that allows the wafer level manufacturing of stackable, encapsulated devices. Using a transfer molded epoxy demonstrator, a proof-of-concept is performed showing the feasibility of the stackable package approach. This is achieved by combining wafer level encapsulation and molded interconnect device technology. An electroless process for metallization and laser techniques for structuring the metallization layer have been applied to generate structures for reliable interconnects capable for the use of lead-free solders. Summarized, this paper presents the process development and feasibility analysis of wafer level packaging technologies for modular SiP solutions based on a duromer MID approach.

Duromer MID technology for system-in-package generation

“…It includes the introduction of a vertically integrated bus system combining data transmission, power supply, and heat transport. This approach has been described in detail in [1]. A schematic is given in Fig.…”

“…This technology is similar to conventional MID technology, which uses thermoplastic polymers as a basis to integrate geometrical and electrical functionality, i.e., to realize a three-dimensional ( with typically one wiring layer for the assembly of electrical components. Applications range from optical sensor packages 1 to automotive electric and home appliance products. 2 With Duromer MID basically the same applications can be realized, but due to the superior thermomechanical matching of duromers to electronic components, it has the potential for direct IC and component embedding and to provide additional functionality to the component(s) packaged as described above.…”

“…T HE Duromer molded interconnect device (MID) technology has been introduced by Fraunhofer IZM at Polytronic in 2003 [1], describing the combination of conventional MID technology with duromer base materials and direct polymer plating processes. This technology is similar to conventional MID technology, which uses thermoplastic polymers as a basis to integrate geometrical and electrical functionality, i.e., to realize a three-dimensional ( with typically one wiring layer for the assembly of electrical components.…”

Stackable system-on-packages with integrated components

“…First results have been described by Kivilahti et al [11] for the embedding of active components onto an organic substrate, encapsulating them and generate a rewiring layer directly on the encapsulant. IZM's Duromer molded interconnect device (MID) technology presented in [12] is taking this approach further by directly applying substrate and encapsulant to the active component. The current status of SOP research at Fraunhofer IZM is to combine both technologies for the volume generation of SIP stacks with interfaces to embedded passives.…”

“…During process development described in [25] detailed information was generated on technology demands and potential, and a proof of concept was achieved. Reliability investigations are underway and will be published accordingly.…”