A New Nano Design for Implementation of a Digital Comparator Based on Quantum-Dot Cellular Automata

Gao, Mingming; Wang, Jinling; Fang, Shaojun; Nan, Jingchang; Li, Daming

doi:10.1007/s10773-020-04499-w

Cited by 25 publications

(16 citation statements)

References 38 publications

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“…An optimized digital comparator consisting 31 QCA cells with 0.75 clock latency has been reported in Reference 29. The structure is based on inverter and majority gates.…”

Section: Previous Related Workmentioning

confidence: 99%

Optimal design for digital comparator using QCA nanotechnology with energy estimation

Sharma

2020

Int J Numerical Modelling

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Quantum‐dot cellular automata (QCA) is a transistor‐less technology to implement the nanoscale circuit designs. QCA circuits are fast, highly dense and dissipate less energy as compared to widely used complementary metal oxide semiconductor (CMOS) technology. In this paper, a novel structure for digital comparator using QCA nanotechnology is proposed. Digital comparator is a basic and important module in central processing unit which compares two binary numbers. The proposed digital comparator is optimal, single layered with 0.50 clock latency and containing only 26 QCA cells. The proposed digital comparator is compared for the different performance metrics with the existing digital comparators. The calculations for energy dissipation are provided using QCA Designer‐E and QCA Pro tools. The proposed coplanar digital comparator is designed with minimum QCA cells which reduces the total cell area, total covered area and cost. Total cell area, total covered area and cost for the proposed digital comparator are 0.008 μm2, 0.023 μm2 and 0.006 respectively. Results show that energy dissipation for the proposed design is very less therefore, proposed digital comparator is energy efficient.

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“…An optimized digital comparator consisting 31 QCA cells with 0.75 clock latency has been reported in Reference 29. The structure is based on inverter and majority gates.…”

Section: Previous Related Workmentioning

confidence: 99%

Optimal design for digital comparator using QCA nanotechnology with energy estimation

Sharma

2020

Int J Numerical Modelling

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“…Evidently, the diversity of QCA-based logic and memory structures is introducing QCA technology as an important candidate for future computing systems. In this context, the comparator is a critical component in a plethora of digital applications including processors, microcontrollers and digital communication systems [24]- [26]. It has the function of defining three states of two n-bit numbers, which may be provided in serial or parallel manner, and then comparing and providing three possible cases: equal, larger, or smaller than each other [24]- [27].…”

Section: Introductionmentioning

confidence: 99%

“…Their implemented QCA-based comparator reduces cell count, occupied area, latency and cost with respect to earlier existing structures. More recently, Gao et al [26] have proposed a 1-bit QCA comparator utitlizing a single layer and 31 QCA cells with an occupational area of 0.04 μm 2 . Their proposed structure has required two AND gates, one OR gate and three inverters.…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of single layer quantum dot-cellular automata based 1- bit comparators

Altarawneh

Al-Tarawneh

2022

TELKOMNIKA

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“…In the year 1997, it was first manufactured (Lent et al , 1994). Till now, scientists and researchers all over the world have designed various circuits of different types utilizing QCA technology as a base technology (Porod, 1997; Yaser Adelnia, 2018; Gao et al , 2020; Senthilnathan and Kumaravela, 2020).…”

Section: Introductionmentioning

confidence: 99%

Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Kassa

Gupta

Kumar

et al. 2021

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Purpose In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits. Design/methodology/approach This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration. Findings A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level. Originality/value This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

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A New Nano Design for Implementation of a Digital Comparator Based on Quantum-Dot Cellular Automata

Cited by 25 publications

References 38 publications

Optimal design for digital comparator using QCA nanotechnology with energy estimation

Optimal design for digital comparator using QCA nanotechnology with energy estimation

Design and analysis of single layer quantum dot-cellular automata based 1- bit comparators

Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

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