A new dopant activation technique for poly-Si TFTs with a self-aligned gate-overlapped LDD structure

Ohgata, K.; Mishima, Y.; Sasaki, Nobuo

doi:10.1109/iedm.2000.904293

Cited by 11 publications

(4 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To reduce the electric field at the drain without appreciable series resistance effects, the GOLDD structure has been proposed [63]- [65], as shown in Fig. 10.…”

Section: J Gate-overlapped Ldd (Goldd) Structurementioning

confidence: 99%

“…As mentioned before, the LDD or offset regions might degrade the device driving capability due to the large series resistance existing in these regions. In order to reduce the electric field at the drain without appreciable series resistance effects, gate overlapped lightly doped drain (GOLDD) structure has been proposed [63]- [65]. The GOLDD structure is shown in Fig.…”

Section: J Gate Overlapped Ldd (Goldd) Structurementioning

confidence: 99%

See 1 more Smart Citation

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

Orouji

Kumar

2006

IEEE Trans. Device Mater. Relib.

View full text Add to dashboard Cite

This paper critically examines the leakage current reduction techniques for improving the performance of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) used in active matrix liquid crystal displays. This is a first comprehensive study in literature on this topic. The review assesses important proposals to circumvent the leakage current problem in poly-Si TFTs and a short evaluation of strengths and weaknesses specific to each method is presented. Also, a new device structure called the triple-gate poly-Si TFT (TG-TFT) is discussed. The key idea in the operation of this device is to make the dominant conduction mechanism in the channel to be controlled by the accumulation charge density modulation by the gate and not by the gate-induced grain barrier lowering. Using two-dimensional and two-carrier device simulation, it is demonstrated that the TG-TFT exhibits a significantly diminished pseudosubthreshold conduction leading to several orders of magnitude reduction in the OFF-state leakage current when compared with a conventional poly-Si TFT. The reasons for the improved performance are explained.Index Terms-Active liquid crystal displays, leakage current, polycrystalline silicon (poly-Si), thin-film transistor (TFT), traps.

show abstract

“…To reduce the electric field at the drain without appreciable series resistance effects, the GOLDD structure has been proposed [63]- [65], as shown in Fig. 10.…”

Section: J Gate-overlapped Ldd (Goldd) Structurementioning

confidence: 99%

Section: J Gate Overlapped Ldd (Goldd) Structurementioning

confidence: 99%

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

Orouji

Kumar

2006

IEEE Trans. Device Mater. Relib.

View full text Add to dashboard Cite

show abstract

“…Also, poly-Si TFTs have the potential to be used in three-dimensional (3-D) circuits, including vertically integrated SRAMs and DRAMs. Recently, a lot of efforts have been put forth to improve the gate controllability and device performance by changing device structure of poly-Si TFTs with complicated steps, such as the gate-overlapped lightly doped drain (GO-LDD) TFT [1], the double-gate TFT [2], and the gateall-around TFT [3]. Moreover, poly-Si TFTs with nano scale feature sizes have also been proposed to reduce the influence of the grain boundary defects [4]- [5].…”

Section: Introductionmentioning

confidence: 99%

P‐5: Spacer Technique to Fabricate pSi TFTs with 50nm Nanowire Channels

Chang

Chen

et al. 2008

Symp Digest of Tech Papers

View full text Add to dashboard Cite

In this work, polycrystalline silicon thin‐film transistors (poly‐Si TFTs) with 50‐nm nanowire (NW) channels fabricated without advanced photolithography by using a sidewall spacer formation technique are proposed for the first time. Because the poly gate electrode is perpendicularly across poly‐Si NW channels to form a tri‐gate‐like structure, the proposed poly‐Si NW TFT owns an outstanding gate controllability. In summary, a simple and low‐cost scheme is proposed to fabricate high‐performance poly‐Si NW TFT suitable for future display manufacturing and practical applications.

show abstract

“…Recently, gate-overlapped LDD structure has been adopted to suppress the high drain field effects for improving device reliability and reducing leakage current while a high on-state current remains. Many processes have also been proposed to produce the gate-overlapped LDD poly-Si TFTs [5]- [7]. Among them, including nonself-aligned and self-aligned processes, additional processes must be performed, which result in increase of the cost of fabrication.…”

Section: Introductionmentioning

confidence: 99%

A novel laser-processed self-aligned gate-overlapped LDD poly-Si TFT

Lin

Tseng

Chang

et al. 2002

IEEE Electron Device Lett.

View full text Add to dashboard Cite

A novel process for fabricating self-aligned gate-overlapped LDD (SAGOLDD) poly-Si thin film transistors (TFTs) was demonstrated. Laser irradiation for dopant activation was performed from the backside of the quartz wafer. The graded LDD structure was naturally formed under the gate edges due to the lateral diffusion of the dapants during the laser activation. In comparison with the conventional laser-processed self-aligned poly-Si TFTs, the SAGOLDD poly-Si TFTs exhibited lower leakage current, suppressed kink effect, and higher reliability. Moreover, the proposed process was simple and very suitable for low-temperature process.Index Terms-Excimer laser, poly-Si thin film transistor, selfaligned gate-overlapped LDD.

show abstract

A new dopant activation technique for poly-Si TFTs with a self-aligned gate-overlapped LDD structure

Cited by 11 publications

References 3 publications

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

P‐5: Spacer Technique to Fabricate pSi TFTs with 50nm Nanowire Channels

A novel laser-processed self-aligned gate-overlapped LDD poly-Si TFT

Contact Info

Product

Resources

About