A Multiplexor Based Test Method for Self-Timed Circuits

Beest, Frank te; Peeters, A.

doi:10.1109/async.2005.5

Cited by 15 publications

(6 citation statements)

References 10 publications

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“…Then, we focus on testing for delay faults that cause the circuit to malfunction. The proposed methods are built upon the multiplexer-based full scan test method in [13] with minimal additional hardware.…”

Section: Proposed Methodsmentioning

confidence: 99%

“…The proposed test method for delay faults in the control block makes use of the multiplexer-based full-scan method [13] for stuckat faults in handshake circuits. After scan insertion, asynchronous handshake circuits can be tested similarly to synchronous circuits.…”

Section: Test For Performance Degradationmentioning

confidence: 99%

“…The above full-scan method was refined in [13] by introducing multiplexer-based scannable C-elements, as illustrated in Figure 2. The proposed method significantly reduces the overhead in performance and area of the scan testable circuit.…”

Section: Testing Stuck-at Faults Using Full-scanmentioning

confidence: 99%

“…Due to the autonomous behavior of asynchronous circuits, manufacturing defects may demonstrate themselves in a different way than in synchronous circuits and, thus, require a different test methodology. Considerable research [2,4,8,10,11,13] has been done on test generation and design for testability (DFT) methods for stuck-at faults in various classes of asynchronous circuits. However, not much research [3,5,7,12] has been conducted on testing delay faults.…”

Section: Introductionmentioning

confidence: 99%

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Testing delay faults in asynchronous handshake circuits

Shi

Makris²

2006

Proceedings of the 2006 IEEE/ACM International Conference on Computer-Aided Design - ICCAD '06

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As a class of asynchronous circuits, handshake circuits are designed to tolerate variation of gate delays. However, certain timing constraints, such as the bundled data assumption, are exploited in the single-rail implementation of these circuits in order to simplify them. Therefore, any delay fault in the circuit may cause one of two problems, namely performance degradation or logic errors. To address the challenges incurred by the autonomous behavior of handshake circuits during at-speed test, we propose test methods for both types of delay faults based on a DFT strategy which greatly simplifies the complexity of test generation. The efficiency of the proposed methodology is demonstrated through experimental results on several handshake circuits.

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Section: Proposed Methodsmentioning

confidence: 99%

Section: Test For Performance Degradationmentioning

confidence: 99%

Section: Testing Stuck-at Faults Using Full-scanmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Testing delay faults in asynchronous handshake circuits

Shi

Makris²

2006

Proceedings of the 2006 IEEE/ACM International Conference on Computer-Aided Design - ICCAD '06

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“…The optional scan test is based on the synchronous multiplexer-based testing method introduced in [17]. One major improvement is the use of clock gating to introduce the synchronous clock into the circuit.…”

Section: Post Processingmentioning

confidence: 99%

Click Elements: An Implementation Style for Data-Driven Compilation

Peeters

Beest

Wit

et al. 2010

2010 IEEE Symposium on Asynchronous Circuits and Systems

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This paper presents a new design template and design flow for the implementation of data-driven asynchronous circuits. It relies on the use of edge-triggered flip-flops as the only storage elements, not only for the datapaths, but also for the control circuits; latches and C-elements that are common in many asynchronous circuit design styles are not required. The design template uses a two-phase handshake protocol for inter-component communication. In a pipeline structure, these circuits operate near the speed of Mousetrap circuits, but the required design-flow is simpler. The implementation stylewhich we refer to as Click elements -has been chosen to resemble synchronous circuits as much as possible. This allows for the use of conventional optimization and timing tools in the design flow and for a cheaper design-for-test implementation. The click templates are well suited for a data-flow driven compilation flow, which avoids much of the control overhead of traditional syntax-directed compilation. The two-phase circuits show a significant improvement in performance and energy efficiency compared to four-phase single-rail circuits.

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An Asynchronous Design for Testability and Implementation in Thin-film Transistor Technology

Cheng

2011

J Electron Test

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A Multiplexor Based Test Method for Self-Timed Circuits

Cited by 15 publications

References 10 publications

Testing delay faults in asynchronous handshake circuits

Testing delay faults in asynchronous handshake circuits

Click Elements: An Implementation Style for Data-Driven Compilation

An Asynchronous Design for Testability and Implementation in Thin-film Transistor Technology

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