A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

Pan, Yu; Ouyang, Peng; Zhao, Yinglin; Wang, Kang; Yin, Shouyi; Zhang, Youguang; Zhao, Weisheng; Wei, Shaojun

doi:10.1109/tmag.2018.2848625

Cited by 66 publications

(43 citation statements)

References 8 publications

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“…Some of them are considering the binary approximations, choosing an implementation based on emerging technologies. Some works [12,13,26,27] are based on MTJ technology while [15][16][17][18]28,29] have used RRAM. In each of these works the resistive element is used to perform simple logical operations based on current sensing technique.…”

Section: Nn Implementations Based On Lim Conceptmentioning

confidence: 99%

Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study

Coluccio

Vacca

Turvani

2020

JLPEA

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Recently, the Logic-in-Memory (LiM) concept has been widely studied in the literature. This paradigm represents one of the most efficient ways to solve the limitations of a Von Neumann’s architecture: by placing simple logic circuits inside or near a memory element, it is possible to obtain a local computation without the need to fetch data from the main memory. Although this concept introduces a lot of advantages from a theoretical point of view, its implementation could introduce an increasing complexity overhead of the memory itself, leading to a more sophisticated design flow. As a case study, Binary Neural Networks (BNNs) have been chosen. BNNs binarize both weights and inputs, transforming multiply-and-accumulate into a simpler bitwise logical operation while maintaining high accuracy, making them well-suited for a LiM implementation. In this paper, we present two circuits implementing a BNN model in CMOS technology. The first one, called Out-Of-Memory (OOM) architecture, is implemented following a standard Von Neumann structure. The same architecture was redesigned to adapt the critical part of the algorithm for a modified memory, which is also capable of executing logic calculations. By comparing both OOM and LiM architectures we aim to evaluate if Logic-in-Memory paradigm is worth it. The results highlight that LiM architectures have a clear advantage over Von Neumann architectures, allowing a reduction in energy consumption while increasing the overall speed of the circuit.

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Section: Nn Implementations Based On Lim Conceptmentioning

confidence: 99%

Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study

Coluccio

Vacca

Turvani

2020

JLPEA

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“…Sebastian et al [20] exploit the physical dynamics of PCM material and propose computational PCM to perform the temporal correlation detection between stochastic binary processes. One Multi-level STT-RAM cell Figure 2: The execution flow, computing array, and multilevel STT-RAM cell for convolutional layers of Binary CNN in [12]. process is encoded into a SET pulse whose amplitude or duration is proportional to the instantaneous sum of all processes and enters the assigned PCM device.…”

Section: Logic and Basic Arithmetic Operationsmentioning

confidence: 99%

An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications

Yan

Hai

2019

Proceedings of the 2019 Great Lakes Symposium on VLSI

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The conventional von Neumann architecture has been revealed as a major performance and energy bottleneck for rising data-intensive applications. The decade-old idea of leveraging in-memory processing to eliminate substantial data movements has returned and led extensive research activities. The effectiveness of in-memory processing heavily relies on the memory scalability, which cannot be satisfied by traditional memory technologies. Emerging non-volatile memories (eNVMs) that pose appealing qualities such as excellent scaling and low energy consumption, on the other hand, have been heavily investigated and explored for realizing in-memory processing architecture. In this paper, we summarize the recent research progress in eNVM-based in-memory processing from various aspects, including the adopted memory technologies, locations of the in-memory processing in system, supported arithmetics, as well as applied applications.

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“…The authors in Reference [3] use an MTJ subarray as part of an accelerator for low bit-width convolutional NN. Recent work also covers multi-level MRAM cells to implement BNN [32]. Networks with binary weights utilizing STT-MRAM were proposed in Reference [2].…”

Section: Related Workmentioning

confidence: 99%

“…Pinatubo [27] embeds digital logic circuits into the memory for inter-subarray computation. The authors in Reference [32] use an auxiliary processing unit to perform batch-normalization, multiplication, and pooling. The design in Reference [3] performs operations such as bit counting, summation, quantization, and batch normalization external to the array.…”

Section: Related Workmentioning

confidence: 99%

“…Pinatubo [27] is not explicitly tailored to NN acceleration. At the same time, the convolutional networks implemented in our study are an order of magnitude larger than the network proposed in Reference [32]. Our baseline spintronic PIM substrate, CRAM, was introduced in Reference [7] and evaluated for simple and very small-scale (non-binary) NN (limited to a single-neuron digit recognizer and 2D convolution, specifically) in Reference [46].…”

Section: Related Workmentioning

confidence: 99%

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Pimball

Resch

Khatamifard

Chowdhury

et al. 2019

ACM Trans. Archit. Code Optim.

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Neural networks span a wide range of applications of industrial and commercial significance. Binary neural networks (BNN) are particularly effective in trading accuracy for performance, energy efficiency, or hardware/software complexity. Here, we introduce a spintronic, re-configurable in-memory BNN accelerator, PIMBALL: Processing In Memory BNN AcceL(L)erator, which allows for massively parallel and energy efficient computation. PIMBALL is capable of being used as a standard spintronic memory (STT-MRAM) array and a computational substrate simultaneously. We evaluate PIMBALL using multiple image classifiers and a genomics kernel. Our simulation results show that PIMBALL is more energy efficient than alternative CPU-, GPU-, and FPGA-based implementations while delivering higher throughput. CCS Concepts: • Computer systems organization → Other architectures;

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A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

Cited by 66 publications

References 8 publications

Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study

Logic-in-Memory Computation: Is It Worth It? A Binary Neural Network Case Study

An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications

Pimball

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