A Monte-Carlo engineer tool for the prediction of SEU proton cross section from heavy ion data

Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

“…Total SET rate estimated with OMERE [17] for each circuit and its hardened version for the LEO (800km, 98°) and ISS (400km, 51.64°) orbit considering heavy ions and protons. Proton-induced SET rates are estimated with the METIS method [18,19]. The SET cross section average of each input signal is used.…”

“…Although the cross-section calculations were performed for heavy ions, the protons are expected to dominate the SEE rates in the LEO and ISS orbits. Due to its improved accuracy when compared to analytical models, the METIS method [18,30,31] was used to predict the protoninduced SET cross section curves from the heavy ions data. The sum of the SET rate induced by heavy ions and protons are shown in Fig.…”

“…Further, the in-orbit SET rates are predicted with OMERE package [17] for heavy ions and protons in Low-Earth Orbit (LEO) and International Space Station (ISS) orbits. Proton-induced SET rates are calculated from the heavy ion data using the METIS method [18,19]. Besides exploiting the transistor folding technique, the novelty of this work also lays on the usage of transistor folding with split in the active area of the transistors on different combinational logic gates to reduce area overhead.…”

Prediction of proton cross sections for SEU in SRAMs and SDRAMs using the METIS engineer tool

“…In [5], the METIS tool was validated for SEU simulation in SRAMs using a large number of commercial CMOS memories. For most of the devices, especially for deep submicron technologies, this tool gives more accurate predictions than SIMPA and PROFIT and the margin of 10 recommended in the ECSS Standard [15] when using SIMPA and PROFIT as a prediction tool could thus be reduced to about 3 when using METIS.…”

“…The tool has been extensively validated for SEU calculation on SRAM devices, bulk or SOI up to 45 nm [5]. We propose here to further validate the tool for very deep submicron SRAMs (45 and 28 nm) and to extend the validation to SEU in SDRAMs.…”