2015
DOI: 10.1016/j.nima.2015.02.052
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A Monolithic Active Pixel Sensor for ionizing radiation using a 180nm HV-SOI process

Abstract: a b s t r a c tAn improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffers from radiation damage such as transistor threshold voltage shifts due to char… Show more

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Cited by 55 publications
(17 citation statements)
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“…In [11] it was shown that depleted active pixel sensors can be made in a commercial HV CMOS technology which allows application of higher bias voltages resulting in larger depleted depths and therefore significant charge collection from drift of charge carriers which is necessary for HL-LHC environment. This was followed by several other developments in various flavours of CMOS processes resulting in prototypes of active pixel detectors with significant depleted thickness [12][13][14] which can be commonly named as depleted CMOS pixels [15]. Recent irradiation study of depleted CMOS pixels irradiated with reactor neutrons up to HL-LHC fluence was published in [16].…”
Section: Introductionmentioning
confidence: 99%
“…In [11] it was shown that depleted active pixel sensors can be made in a commercial HV CMOS technology which allows application of higher bias voltages resulting in larger depleted depths and therefore significant charge collection from drift of charge carriers which is necessary for HL-LHC environment. This was followed by several other developments in various flavours of CMOS processes resulting in prototypes of active pixel detectors with significant depleted thickness [12][13][14] which can be commonly named as depleted CMOS pixels [15]. Recent irradiation study of depleted CMOS pixels irradiated with reactor neutrons up to HL-LHC fluence was published in [16].…”
Section: Introductionmentioning
confidence: 99%
“…Regarding the small fill-factor structures, some devices of this type have been also produced in TowerJazz Ltd. [18] following the TJ 180 nm process as the TJ-Monopix device [11] or the TJ-Malta device [13]. A special type of CMOS technology, the High Voltage Silicon On Insulator, is also available at X-FAB Semiconductor Foundries AG [19], several devices have been implemented in the XFAB 180 nm process, like the XTB01 device [20]. Finally, it must be emphasized that the current technologies available for CMOS sensors offer feature sizes larger than 130 nm, therefore the radiation tolerance and logic density of these devices can be further improved with smaller sizes in the future.…”
Section: Commercial Cmos Foundriesmentioning
confidence: 99%
“…The HV-SOI technology allows access to the handling wafer/substrate using vias to create a charge collecting node as well as provide bias to the sensor A standard CMOS circuit can be realized in the logic layer above BOX. The prototyped devices in HV-SOI technology XTB01and XT02 [30,31] are fully functional. Figure 17a shows that they have good radiation tolerance to surface damage.…”
Section: Hv-soimentioning
confidence: 99%