The nano‐size MOS transistor is the ideal device for the smooth transition from micro‐ to nanoelectronics, the stringent condition being to be fabricated ‘On Insulator'. It is the SOI thickness effect which renders the scaling of MOS transistors intrinsically easier than in bulk Si. In addition, SOI is a most suitable substrate for the implementation of non‐classic or pure nanoelectronic components. The dimensions of state‐of‐the‐art SOI MOSFETs are already measurable in nanometers. We illustrate, from experimental and theoretical viewpoints, a number of nano‐size mechanisms and their implications for multiple‐gate MOSFETs and alternative nano‐devices. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)