A mm-Wave CMOS Heterodyne Receiver with On-Chip LO and Divider

Abstract

The unlicensed band around 60GHz has motivated work on mmwave CMOS building blocks such as low-noise amplifiers (LNAs) and mixers [1,2] and oscillators [3]. However, the integration of these building blocks to form transceivers poses additional constraints on the design of these circuits. For example, a direct-conversion receiver would require at least two inductors for the LNA, one inductor for each quadrature mixer, at least two inductors for the quadrature oscillator, and at least one inductor for the first divider in the synthesizer loop. (In practice, each side of the quadrature oscillator must be loaded by a divider to retain phase balance, thus requiring one more inductor.) With the large foot print of the inductors, the 60GHz quadrature phases of the LO must travel a long distance before reaching the mixers (or, if the mixer transistors are placed next to the LO transistors, the RF signal must travel a long distance to reach the mixers.) Under these conditions, both the loss and mismatches contributed by the long interconnects degrade the performance of the LO and the receiver considerably. Insertion of buffers between the LO and the mixers does not resolve the mismatch issues as the buffers themselves must incorporate inductors. (The buffers are still necessary to avoid injection pulling of the LO by large in-band interferers received and amplified by the LNA.) This paper describes a heterodyne receiver that avoids quadrature separation at mm-wave frequencies, easing the management of interconnect lengths and allowing the integration of all highfrequency building blocks.Figure 10.1.1 shows the receiver architecture, where the RF mixer is directly driven by the LO and the IF mixers by half of the LO frequency. While designed for operation at 60GHz (with f LO =40GHz), the fabricated prototype yields f LO ≈35GHz and is tested with an input frequency of 53GHz. (A prototype with adjusted inductor values to allow operation at 60GHz is presently in fabrication.) Several aspects of the above architecture merit consideration. First, in contrast to a 60GHz quadrature LO required in direct conversion, the oscillator used here must operate at 40GHz and provide only differential outputs. Therefore, it potentially achieves a lower phase noise especially because the Q of varactors appears to fall below that of inductors at high frequencies. Second, the choice of divide-by-2 [4] over divide-by-4 is governed by the level of image rejection that can be achieved by the selectivity of the front-end. Third, even though directly tied to the RF mixer, the LO is not pulled by in-band interferers because they bear a frequency difference as high as f RF /3 with respect to f LO . Fourth, the divide-by-2 circuit must operate at a nominal frequency of 40GHz, dictating either an injection-locked topology which suffers from a narrow lock range and hence poses risks on the overall design, or a Miller regenerative topology which does not readily produce quadrature phases. In this work, a Miller divider is chosen and the quadrature oper...

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“…31(a), where the received signal is downconverted using a local oscillator (LO) consuming a power of several tens of mW (Razavi, 2007;Mitomoto, 2007). Also, total power dissipation will even increase using a high-speed analog-to-digital converter (ADC) and a high-speed demodulator (DMOD), particularly for the multi-Gbps data rate.…”

“…19.2mW LNA (Afshar, 2008) 24mW PLL, DMOD (Parsa, 2008) 36mW DMOD (Scheir, 2008) 65mW DMOD (Razavi, 2007) 80mW DMOD (Mitomoto, 2007) 144mW DMOD Table 1. Comparison of 60GHz receivers.…”

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“…The passive components in CMOS technologies, such as inductors, transmission lines and metal-insulator-metal (MIM) capacitors, scale with increasing operating frequency, and complement the operation of active devices by optimizing gain over a reduced bandwidth (e.g., using a resonant loads). The combined effects of frequency and device scaling with potential mm-wave applications are stimulating many new research activities [3]- [6], [16]- [20], [24]- [26].…”

A 60GHz CMOS Receiver Using a 30GHz LO

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Recent work on receivers for the 60GHz band has considered various frequency plans to ease the design of the building blocks, particularly the local oscillator (LO) and the frequency dividers [1][2][3]. A natural choice of the LO frequency in a heterodyne system is half of the input frequency as it places the image in the vicinity of zero while greatly simplifying the design and distribution of the LO and divider signals [4].

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“…While suited to frequencies in the range of 20GHz, the current-mode phase shifter in [1] would call for impractically small capacitor values at 60GHz. Also, the microwave couplers proposed in [5] require a large area and accurate impedance matching.…”