A Method to Isolate Intrinsic HCD and NBTI Contributions Under Self Heating During Varying V_G/V_D Stress in GAA Nanosheet PFETs

A Review of Reliability in Gate-All-Around Nanosheet Devices

“…HCI reliability's dependence on Wsheet in NS is influenced by two competing mechanisms that have conflicting effects. On the one side, the NS FET of wider sheets has a higher current and more intense self-heating effect (SHE) under the same stress condition, both contributing to an increase in HCD [12,18,25]. On the other side, the contribution from the flat areas of the sheets becomes more significant than that from the corners at wider Wsheet.…”

“…Despite the superior gate control and performance, the vertically stacked GAA structure results in increased thermal confinement, primarily due to the absence of a direct bulk connection to the Si channels and the poor thermal conductivity of the IL/high-k layers surrounding these Si channels [12]. Numerous studies from academic and industrial sources have observed a more pronounced SHE in GAA NS than in FinFET, as is evidenced by both simulation and experimental data [12,25,[35][36][37][38][39][40]. SHE challenges are intensified in NS designs that feature wider and thicker sheets, and a higher count of vertically stacked Si channels [12,25,[36][37][38][39].…”

“…SHE challenges are intensified in NS designs that feature wider and thicker sheets, and a higher count of vertically stacked Si channels [12,25,[36][37][38][39]. While the transition from FinFET to NS technology may bring less thermal concern than the shift from planar to FinFET and affects only a limited portion of the circuits [12], precise thermal modeling remains crucial in NS technology for accurate HCI reliability evaluation [25,[36][37][38][39].…”

“…Recently, there has been a surge in publications exploring device reliability in NS [22][23][24][25][36][37][38][39][44][45][46]. The consensus across these studies is that the majority of the fundamental degradation mechanisms in NS devices, such as BTI, HCI, Gate oxide TDDB, and PC to CA TDDB, are similar to those in FinFET and planar devices, and governed by the same underlying physics and kinetics.…”

Interaction of Negative Bias Instability and Self-Heating Effect on Threshold Voltage and SRAM (Static Random-Access Memory) Stability of Nanosheet Field-Effect Transistors

“…Although they did not start from a trap dynamics perspective, their study still provides valuable insights [ 25 ]. Although some people have studied how to decouple NBTI and HCI effects under the influence of self-heating effects, they have yet to explore the interrelationship between NBTI and self-heating effects in detail [ 26 ]. Considering the importance of NSFETs and the severe impact of the self-heating effect on NBTI in P-type NSFETs, it is necessary to conduct in-depth research on this issue.…”