A mathematical method to realize complex poles in a high‐order passive switched‐capacitor filter

Abstract

Summary A high‐order discrete‐time IIR low‐pass with complex poles using charge sampling is presented in a single‐stage structure by using a mathematical strategy. In comparison with the analog complex‐poles Gm‐C filters, the proposed filter consumes lower power and has good linearity, and all of the tunings are implemented only by capacitor sizes. The proposed filter is a seventh‐order Butterworth, but this method can be generalized to implement other complex pole filters like Tchebyshev and Elliptic. Post‐layout simulation results in 130‐nm complementary metal‐oxide‐semiconductor (CMOS) show an IIP3 of +18 dBm and a noise figure of 5 dB. The filter has a rejection of more than 110 dB in its stop band and consumes 1.5 mW with a 1.6‐V supply voltage, and circuit occupies an about 0.12 mm2 of silicon.