1999
DOI: 10.1889/1.1834069
|View full text |Cite
|
Sign up to set email alerts
|

A Low Temperature Poly‐Si TFT with a SMC Poly‐Si Crystallized at 420 °C

Abstract: Amorphous silicon (a‐Si) was crystallized by silicide mediated crystallization (SMC) using a very thin metal layer on a‐Si. Such structure can be crystallized by annealing for 30 min at 420 °C in the presence of an electric field of 100 V/cm. The poly‐Si TFT was fabricated using a triple layers of SMC poly‐Si, silicon‐nitride (SiNx), and a‐Si:H. The TFT exhibited a field effect mobility of 24 cm2/Vs and a threshold voltage of 1V, and an on/off current ratio of ∼105. The SMC poly‐Si TFT is very suitable for the… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1

Citation Types

0
2
0

Year Published

2000
2000
2008
2008

Publication Types

Select...
4

Relationship

0
4

Authors

Journals

citations
Cited by 4 publications
(2 citation statements)
references
References 12 publications
0
2
0
Order By: Relevance
“…Note that the mobility of the needlelike crystallites is much lower than that of disk-shaped grains. 12,13 In this work, the poly-Si having no needlelike grains has a higher mobility. Figure 5 shows the transfer ͑a͒ and output ͑b͒ characteristics of a MICC poly-Si TFT made on the SOG layer with O 2 -plasma treatment time of 90 s. The ratio of channel width to length of the TFT was 8:8 m. Table I summarizes the device performances of the LTPS TFTs on the SOG buffer layer.…”
Section: J156mentioning
confidence: 74%
“…Note that the mobility of the needlelike crystallites is much lower than that of disk-shaped grains. 12,13 In this work, the poly-Si having no needlelike grains has a higher mobility. Figure 5 shows the transfer ͑a͒ and output ͑b͒ characteristics of a MICC poly-Si TFT made on the SOG layer with O 2 -plasma treatment time of 90 s. The ratio of channel width to length of the TFT was 8:8 m. Table I summarizes the device performances of the LTPS TFTs on the SOG buffer layer.…”
Section: J156mentioning
confidence: 74%
“…The SMC of a-Si in an electric field, a technique compatible with batch process, was developed for the low temperature poly-Si TFTs [10]. The lateral grain size of the SMC poly-Si increase with decreasing the metal thickness.…”
Section: (A) (B)mentioning
confidence: 99%