A low-power fully integrated CMOS RF receiver for 2.4-GHz-band IEEE 802.15.4 standard

Mateos-Angulo, Sergio; Mayor-Duarte, Daniel; Khemchandani, Sunil L.; Pino, J. del

doi:10.1109/dcis.2015.7388563

Cited by 6 publications

(6 citation statements)

References 5 publications

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“…Most works on conventional receivers are based on the Zero-IF or Low-IF direct conversion architectures [ 7 , 8 , 9 , 10 ]. However, the Zero-IF topology is rarely used to implement a WuR due to the presence of flicker noise and DC offsets after signal down-conversion.…”

Section: Envelope Detector Wur With Off-chip Componentsmentioning

confidence: 99%

Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications

Galante-Sempere

Ramos-Valido

Khemchandani

et al. 2020

Sensors

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The development of wake-up receivers (WuR) has recently received a lot of interest from both academia and industry researchers, primarily because of their major impact on the improvement of the performance of wireless sensor networks (WSNs). In this paper, we present the development of three different radiofrequency envelope detection (RFED) based WuRs operating at the 868 MHz industrial, scientific and medical (ISM) band. These circuits can find application in densely populated WSNs, which are fundamental components of Internet-of-Things (IoT) or Internet-of-Everything (IoE) applications. The aim of this work is to provide circuits with high integrability and a low cost-per-node, so as to facilitate the implementation of sensor nodes in low-cost IoT applications. In order to demonstrate the feasibility of implementing a WuR with commercially available off-chip components, the design of an RFED WuR in a PCB mount is presented. The circuit is validated in a real scenario by testing the WuR in a system with a pattern recognizer (AS3933), an MCU (MSP430G2553 from TI), a transceiver (CC1101 from TI) and a T/R switch (ADG918). The WuR has no active components and features a sensitivity of about −50 dBm, with a total size of 22.5 × 51.8 mm2. To facilitate the integration of the WuR in compact systems and low-cost applications, two designs in a commercial UMC 65 nm CMOS process are also explored. Firstly, an RFED WuR with integrated transformer providing a passive voltage gain of 18 dB is demonstrated. The circuit achieves a sensitivity as low as −62 dBm and a power consumption of only 528 nW, with a total area of 634 × 391 μm2. Secondly, so as to reduce the area of the circuit, a design of a tuned-RF WuR with integrated current-reuse active inductor is presented. In this case, the WuR features a sensitivity of −55 dBm with a power consumption of 43.5 μW and a total area of 272 × 464 μm2, obtaining a significant area reduction at the expense of higher power consumption. The alternatives presented show a very low die footprint with a performance in line with most of the state-of-the-art contributions, making the topologies attractive in scenarios where high integrability and low cost-per-node are necessary.

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Section: Envelope Detector Wur With Off-chip Componentsmentioning

confidence: 99%

Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications

Galante-Sempere

Ramos-Valido

Khemchandani

et al. 2020

Sensors

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“…The designed conventional low-IF architecture presented in [36] is studied. Figure 9 shows the schematic of the receiver architecture.…”

Section: Single Event Transients In a Conventional Low-if Receivermentioning

confidence: 99%

Single-Event Transients in an IEEE 802.15.4 RF Receiver for Wireless Sensor Networks

Mateos-Angulo

Pino

Mayor-Duarte

et al. 2020

Sensors

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This paper presents a procedure to analyse the effects of radiation in an IEEE 802.15.4 RF receiver for wireless sensor networks (WSNs). Specifically, single-event transients (SETs) represent one of the greatest threats to the adequate performance of electronic communication devices in high-radiation environments. The proposed procedure consists in injecting current pulses in sensitive nodes of the receiver and analysing how they propagate through the different circuits that form the receiver. In order to perform this analysis, a Complementary Metal Oxide Semiconductor (CMOS) low-IF receiver has been designed using a 0.18 μm technology from the foundry UMC. In order to analyse the effect of single-event transients in this receiver, it has been studied how current pulses generated in the low-noise amplifier propagate down the receiver chain. The effect of the different circuits that form the receiver on this kind of pulse has been studied prior to the analysis of the complete receiver. First, the effect of SETs in low-noise amplifiers was analysed. Then, the propagation of pulses through mixers was studied. The effect of filters in the analysed current pulses has also been studied. Regarding the analysis of the designed RF receiver, an amplitude and phase shift was observed under the presence of SETs.

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“…A Single-Ended LNA is shown in figure 1, the circuit structure utilizes the inductor (L S ) that is connected to the transistor M 1 at the source (inductive source degeneration) [4]. The advantage of this structure is that the designer has flexible control over the value of the real part of the input impedance by choosing the proper inductance.…”

Section: Single-ended Lna Design (Cascode Inductive Source Degeneration)mentioning

confidence: 99%

“…Moreover, a trade-off between the common source gain and increasing the parasitic capacitance of the transistor number 2 (M 2 ) is done by designing W 2 wider. Also, the transistor M 2 helps to reduce the Miller effect (C gd1 ) as well as S 21 [4]. The equivalent current noise resulting from the R bias can be ignored by choosing the value of this resistance large enough.…”

Section: Single-ended Lna Design (Cascode Inductive Source Degeneration)mentioning

confidence: 99%

Optimum Design of 2.4GHz Low Noise Amplifier (LNA)

Abdo¹,

Younis²,

Ismael³

2020

Proceedings of the Proceedings of the 1st International Multi-Disciplinary Conference Theme: Sustainable Development and Smart

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A 2.4 GHz Low Noise Amplifier (LNA) design, optimization and simulation is presented in this paper. The optimization tool available in ADS software is employed to obtain minimum noise figure (NF) and minimum power consumption for an inductive source degeneration LNA topology. A comparison between this approach and another available analytical method is performed and found a significant improvement in noise figure (optimized NF=0.823), and in power consumption (optimized value =8.6 mW).

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A low-power fully integrated CMOS RF receiver for 2.4-GHz-band IEEE 802.15.4 standard

Cited by 6 publications

References 5 publications

Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications

Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications

Single-Event Transients in an IEEE 802.15.4 RF Receiver for Wireless Sensor Networks

Optimum Design of 2.4GHz Low Noise Amplifier (LNA)

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